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BQ24292I Datasheet, PDF (18/42 Pages) Texas Instruments – I2C Controlled 4.5A Single Cell USB/Adapter Charger With Narrow VDC Power Path Management and USB OTG | |||
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bq24292i
SLUSBI4 â APRIL 2013
www.ti.com
IR Compensation / Thermal Regulation Control Register REG06 (default 00000011, or 03)
BIT
DESCRIPTION
NOTE
IR Compensation Resistor Setting
Bit 7
Bit 6
BAT_COMP[2] 40mΩ
BAT_COMP[1] 20mΩ
Range: 0 â 70mΩ
Default: 0Ω (000)
Bit 5 BAT_COMP[0] 10mΩ
IR Compensation Voltage Clamp (above regulation voltage)
Bit 4
Bit 3
VCLAMP[2]
VCLAMP[1]
64mV
32mV
Range: 0 â 112 mV
Default: 0mV (000)
Bit 2 VCLAMP[0]
16mV
Thermal Regulation Threshold
Bit 1
Bit 0
TREG[1]
TREG[0]
00 â 60°C, 01 â 80°C, 10 â 100°C, 11 â
120°C
Default: 120°C (11)
Misc Operation Control Register REG07 (default 01001011, or 4B)
BIT
DESCRIPTION
Set default input current limit from PSEL/OTG pins
Bit 7
DPDM_EN
0 â Not in Input source detection;
1 â Force Input source detection
Safety Timer Setting during Input DPM and Thermal Regulation
Bit 6
TMR2X_EN
0 â Safety timer not slowed by 2X during input DPM
or thermal regulation,
1 â Safety timer slowed by 2X during input DPM or
thermal regulation
Force BATFET Off
Bit 5
BATFET_Disable
0 â Allow Q4 turn on, 1 â Turn off Q4
Bit 4
Reserved
0 - Reserved
Bit 3
Reserved
1 - Reserved
Bit 2
Reserved
0 - Reserved
Bit 1
INT_MASK[1]
0 â No INT during CHRG_FAULT, 1 â INT on
CHRG_FAULT
Bit 0
INT_MASK[0]
0 â No INT during BAT_FAULT, 1 â INT on
BAT_FAULT
NOTE
Default: Not in Input source detection (0).
Reset to 0 after detection complete. INT pulse
may not be generated
Default: Safety timer slowed by 2X (1)
Default: Allow Q4 turn on(0)
Default: INT on CHRG_FAULT (1)
Default: INT on BAT_FAULT (1)
System Status Register REG08
BIT
DESCRIPTION
Bit 7
VBUS_STAT[1] 00 â Unknown (no input, or DPDM detection incomplete), 01 â USB host, 10 â Adapter port, 11 â OTG
Bit 6
VBUS_STAT[0]
Bit 5
Bit 4
CHRG_STAT[1] 00 â Not Charging, 01 â Pre-charge (<VBATLOWV), 10 â Fast Charging, 11 â Charge Termination Done
CHRG_STAT[0]
Bit 3
DPM_STAT
0 â Not DPM, 1 â VINDPM or IINDPM
Bit 2
PG_STAT
0 â Not Power Good, 1 â Power Good
Bit 1
THERM_STAT 0 â Normal, 1 â In Thermal Regulation
Bit 0
VSYS_STAT 0 â Not in VSYSMIN regulation (BAT>VSYSMIN), 1 â In VSYSMIN regulation (BAT<VSYSMIN)
18
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