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BQ24292I Datasheet, PDF (20/42 Pages) Texas Instruments – I2C Controlled 4.5A Single Cell USB/Adapter Charger With Narrow VDC Power Path Management and USB OTG
bq24292i
SLUSBI4 – APRIL 2013
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Shipping Mode
When end equipment is assembled, the system is connected to battery through BATFET. There will be a small
leakage current to discharge the battery even when the system is powered off. In order to extend the battery life
during shipping and storage, the device can turn off BATFET so that the system voltage is zero to minimize the
leakage.
In order to keep BATFET off during shipping mode, the host has to disable the watchdog timer (REG05[5:4]=00)
and disable BATFET (REG07[5]=1) at the same time.
Once the BATFET is disabled, the BATFET can be turned on by plugging in adapter.
Power Up from DC Source
When the DC source plugs in, the device checks the input source voltage to turn on REGN LDO and all the bias
circuits. It also checks the input current limit before starts the buck converter.
REGN LDO
The REGN LDO supplies internal bias circuits as well as the HSFET and LSFET gate drive. The LDO also
provides bias rail to TS1/TS2 external resistors. The pull-up rail of STAT and PG can be connected to REGN as
well.
The REGN is enabled when all the conditions are valid.
1. VBUS above UVLOZ
2. VBUS above battery + VSLEEPZ in buck mode or VBUS below battery + VSLEEPZ in boost mode
3. After typical 220ms delay (100ms minimum) is complete
If one of the above conditions is not valid, the device is in high impedance mode (HIZ) with REGN LDO off. The
device draws less than 50µA from VBUS during HIZ state. The battery powers up the system when the device is
in HIZ.
Input Source Qualification
After REGN LDO powers up, the device checks the current capability of the input source. The input source has
to meet the following requirements to start the buck converter.
1. VBUS voltage below 18V (not in ACOV)
2. VBUS voltage above 3.8V when pulling 30mA (poor source detection)
Once the input source passes all the conditions above, the status register REG08[2] goes high and the PG pin
goes low. An INT is asserted to the host.
If the device fails the poor source detection, it will repeat the detection every 2 seconds.
Input Current Limit Detection
The USB ports on personal computers are convenient charging source for portable devices (PDs). If the portable
device is attached to a USB host, the USB specification requires the portable device to draw limited current
(100mA/500mA in USB 2.0, and 150mA/900mA in USB 3.0). If the portable device is attached to a charging port,
it is allowed to draw up to 1.5A.
After the PG is LOW or REG08[2] goes HIGH, the charger device always runs input current limit detection when
a DC source plugs in unless the charger is in HIZ during host mode.
The device sets input current limit through PSEL and OTG pins.
After the input current limit detection is done, the host can write to REG00[2:0] to change the input current limit.
PSEL/OTG Pins Set Input Current Limit
The device has PSEL which directly takes the USB PHY device output to decide whether the input is USB host
or charging port.
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