DM3730_10 Datasheet, PDF (55/268 Pages) Texas Instruments – Applications Processor

DM3730, DM3725
www.ti.com
SPRS685 – AUGUST 2010
BALL
BOTTOM
[1]
D25
E26
B23
C23
C26
D26
C25
E25
P25
P26
N25
N26
D23
A23
F26
Table 2-2. Ball Characteristics (CBC Pkg.)⁽⁵⁾ (continued)
BALL TOP PIN NAME [3]
[2]
MODE [4] TYPE [5]
NA
cam_d10
0
I
gpio_109
4
IO
hw_dbg8
5
O
safe_mode
7
-
NA
cam_d11
0
I
gpio_110
4
IO
hw_dbg9
5
O
safe_mode
7
-
NA
cam_fld
0
IO
cam_global_reset 2
IO
gpio_98
4
IO
hw_dbg3
5
O
safe_mode
7
-
NA
cam_hs
0
IO
gpio_94
4
IO
hw_dbg0
5
O
safe_mode
7
-
NA
cam_pclk
0
I
gpio_97
4
IO
hw_dbg2
5
O
safe_mode
7
-
NA
cam_strobe
0
O
gpio_126
4
IO
hw_dbg11
5
O
safe_mode
7
-
NA
cam_xclka
0
O
gpio_96
4
IO
safe_mode
7
-
NA
cam_xclkb
0
O
gpio_111
4
IO
safe_mode
7
-
NA
cam_d6
0
I
gpio_105
4
I
safe_mode
7
-
NA
cam_d7
0
I
gpio_106
4
I
safe_mode
7
-
NA
cam_d8
0
I
gpio_107
4
I
safe_mode
7
-
NA
cam_d9
0
I
gpio_108
4
I
safe_mode
7
-
NA
cam_vs
0
IO
gpio_95
4
IO
hw_dbg1
5
O
safe_mode
7
-
NA
cam_wen
0
I
cam_shutter
2
O
gpio_167
4
IO
hw_dbg10
5
O
safe_mode
7
-
NA
dss_acbias
0
O
gpio_69
4
IO
safe_mode
7
-
BALL
RESET
STATE [6]
L
BALL RESET RESET
POWER [9] HYS [10]
REL. STATE REL. MODE
[7]
[8]
L
7
vdds
Yes
L
L
7
vdds
Yes
L
L
7
vdds
Yes
L
L
7
vdds
Yes
L
L
7
vdds
Yes
L
L
7
vdds
Yes
L
L
L
L
L
L
L
L
L
L
L
L
L
L
7
vdds
Yes
7
vdds
Yes
7
vdds
Yes
7
vdds
Yes
7
vdds
NA
7
vdds
NA
7
vdds
Yes
L
L
7
vdds
Yes
L
L
7
vdds
Yes
BUFFER PULLUP
STRENGTH /DOWN
(mA) [11] TYPE [12]
8
PU/ PD
IO CELL
[13]
LVCMOS
8
PU/ PD
LVCMOS
4
PU/ PD
LVCMOS
4
PU/ PD
LVCMOS
4
PU/ PD
LVCMOS
4
PU/ PD
LVCMOS
4
PU/ PD
LVCMOS
4
PU/ PD
LVCMOS
NA
PU/ PD
SubLVDS
NA
PU/ PD
SubLVDS
NA
PU/ PD
SubLVDS
NA
PU/ PD
SubLVDS
4
PU/ PD
LVCMOS
4
PU/ PD
LVCMOS
8
PU/ PD
LVCMOS
Copyright © 2010, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Link(s): DM3730 DM3725
TERMINAL DESCRIPTION
55