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DM3730_10 Datasheet, PDF (117/268 Pages) Texas Instruments – Applications Processor
DM3730, DM3725
www.ti.com
SPRS685 – AUGUST 2010
3.2 Recommended Operating Conditions
The device is used under the recommended operating conditions described in Table 3-4. The POH
information in Table 3-3 is provided solely for your convenience and does not extend or modify the
warranty provided under TI’s standard terms and conditions for TI semiconductor products.
Table 3-3. Reliability Data
JUNCTION TEMP
TOTAL DEVICE LIFETIME
>OPP130 MAX TIME
@105C
89K POH
Not available
@90C
100K POH
45K
@75C
>100K POH
100K POH
(1) If device is only operated at OPP1G, then POH can be extended to 35K POH.
OPP1G MAX TIME
Not available
25K (1)
75K
NOTE
Logic functions and parameter values are not assured out of the range specified in the
recommended operating conditions.
Table 3-4. Recommended Operating Conditions
PARAMETER
DESCRIPTION
MIN
vdd_mpu_iva Supply voltage range for ARM / IVA domain
Maximum Noise (peak-peak)
vdd_core
Supply voltage range for core domain
Maximum Noise (peak-peak)
vdds
Supply voltage for 1.8-V I/O macros
1.71
Maximum Noise (peak-peak)
Oscillator IO (Crystal or
Square modes)
Others
vdds_mem
Supply voltage for memory buffers
1.71
Maximum Noise (peak-peak)
vdds_mmc1
Supply voltage range for mmc1 1.8-V mode
1.71
dual voltage IOs
3.0-V mode
2.70
Noise (peak-peak)
1.8-V mode
3.0-V mode
vdds_x
Supply voltage range for x dual 1.8-V mode
1.71
voltage IOs
3.0-V mode
2.70
Maximum Noise (peak-peak)
1.8-V mode
3.0-V mode
vdda_wkup_bg_ Supply voltage range for wake-up LDO
1.71
bb
Maximum Noise (peak-peak)
vdda_dac
Analog supply voltage for Video DAC
1.71
Maximum Noise (peak-peak) for a frequency from 0 to 100
kHz
(For a frequency > 100 kHz, decreases 20 dB/dec)
vdds_sram
Supply voltage for SRAM LDOs
1.71
Maximum Noise (peak-peak)
vdda_dplls_dll Supply voltage for MPU, IVA, core DPLLs and DLL
1.71
Maximum Noise (peak-peak)
For any frequency
vdda_dpll_per Supply voltage for DPLLs (peripherals)
1.71
Maximum Noise (peak-peak)
For any frequency
vssa_dac
Ground for video buffers and DAC
NOM
See(1)
40
See(1)
40
1.80
40
90
1.80
90
1.80
3.00 to 3.30
90
150
1.80
3.00
90
150
1.80
50
1.80
30
1.80
50
1.80
30
1.80
50
0
MAX
1.91
1.91
1.91
3.60
1.91
3.60
1.91
1.91
1.91
1.91
1.91
UNIT
V
mVPP
V
mVPP
V
mVPP
V
mVPP
V
mVPP
V
mVPP
V
mVPP
V
mVPP
V
mVPP
V
mVPP
V
mVPP
V
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Electrical Characteristics 117