CC3200_15 Datasheet, PDF (54/71 Pages) Texas Instruments – CC3200 SimpleLink™ Wi-Fi® and Internet-of-Things Solution, a Single-Chip Wireless MCU

CC3200
SWAS032F – JULY 2013 – REVISED FEBRUARY 2015
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• Command 0x06 (set write enable). Procedure: SEND 0x06, read status until write-enable bit is set.
• Command 0xC7 (chip erase). Procedure: SEND 0xC7, read status until busy bit is cleared.
• Command 0x03 (read data). Procedure: SEND 0x03, SEND 24-bit address, read n bytes.
• Command 0x02 (write page). Procedure: SEND 0x02, SEND 24-bit address, write n bytes (0<n<256).
• Command 0x20 (sector erase). Procedure: SEND 0x20, SEND 24-bit address, read status until busy
bit is cleared. Sector size is assumed to be always 4K.
5.8.2 Internal Memory
The CC3200 device includes on-chip SRAM to which application programs are downloaded and executed.
The application developer must share the SRAM for code and data. To select the appropriate SRAM
configuration, see the device variants listed in the orderable addendum at the end of this datasheet. The
micro direct memory access (μDMA) controller can transfer data to and from SRAM and various
peripherals. The CC3200 ROM holds the rich set of peripheral drivers, which saves SRAM space. For
more information on drivers, see the CC3200 API list.
5.8.2.1 SRAM
The CC3200 family provides up to 256KB of zero-wait-state, on-chip SRAM. Internal RAM is capable of
selective retention during LPDS mode. This internal SRAM is located at offset 0x2000 0000 of the device
memory map.
Use the µDMA controller to transfer data to and from the SRAM.
When the device enters low-power mode, the application developer can choose to retain a section of
memory based on need. Retaining the memory during low-power mode provides a faster wakeup. The
application developer can choose the amount of memory to retain in multiples of 64KB. For more
information, see the API guide.
5.8.2.2 ROM
The internal zero-wait-state ROM of the CC3200 device is at address 0x0000 0000 of the device memory
and programmed with the following components:
• Bootloader
• Peripheral driver library (DriverLib) release for product-specific peripherals and interfaces
The bootloader is used as an initial program loader (when the serial flash memory is empty). The CC3200
DriverLib software library controls on-chip peripherals with a bootloader capability. The library performs
peripheral initialization and control functions, with a choice of polled or interrupt-driven peripheral support.
The DriverLib APIs in ROM can be called by applications to reduce flash memory requirements and free
the flash memory to be used for other purposes.
5.8.2.3 Memory Map
Table 5-6 describes the various MCU peripherals and how they are mapped to the processor memory. For
more information on peripherals, see the API document.
Start Address
0x0000 0000
0x2000 0000
0x2200 0000
0x4000 0000
0x4000 4000
0x4000 5000
0x4000 6000
End Address
0x0007 FFFF
0x2003 FFFF
0x23FF FFFF
0x4000 0FFF
0x4000 4FFF
0x4000 5FFF
0x4000 6FFF
Table 5-6. Memory Map
Description
On-chip ROM (Bootloader + DriverLib)
Bit-banded on-chip SRAM
Bit-band alias of 0x2000 0000 through 0x200F FFFF
Watchdog timer A0
GPIO port A0
GPIO port A1
GPIO port A2
Comment
54
Detailed Description
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