SMJ320C6701 Datasheet, PDF (52/62 Pages) Texas Instruments – FLOATING-POINT DIGITAL SIGNAL PROCESSOR

SMJ320C6701
FLOATING-POINT DIGITAL SIGNAL PROCESSOR
SGUS030 – APRIL 2000
MULTICHANNEL BUFFERED SERIAL PORT TIMING (CONTINUED)
timing requirements for FSR when GSYNC = 1 (see Figure 32)
NO.
1 tsu(FRH-CKSH) Setup time, FSR high before CLKS high
2 th(CKSH-FRH) Hold time, FSR high after CLKS high
*This parameter is not tested.
’C6701-14
’C6701-16
MIN MAX
*4
*4
UNIT
ns
ns
CLKS
FSR external
CLKR/X (no need to resync)
CLKR/X(needs resync)
1
2
Figure 32. FSR Timing When GSYNC = 1
52
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