SMJ320C6701 Datasheet, PDF (3/62 Pages) Texas Instruments – FLOATING-POINT DIGITAL SIGNAL PROCESSOR

SMJ320C6701
FLOATING-POINT DIGITAL SIGNAL PROCESSOR
SGUS030 – APRIL 2000
device characteristics
Table 1 provides an overview of the ’C6701 DSP. The table shows significant features of each device, including
the capacity of on-chip RAM, the peripherals, the execution time, and the package type with pin count.
Table 1. Characteristics of the ’C6701 Processors
CHARACTERISTICS
Device Number
On-Chip Memory
Peripherals
Cycle Time
Package Type
Nominal Voltage
DESCRIPTION
SMJ320C6701
512-Kbit Program Memory
512-Kbit Data Memory (organized as 2 blocks)
2 Mutichannel Buffered Serial Ports (McBSP)
2 General-Purpose Timers
Host-Port Interface (HPI)
External Memory Interface (EMIF)
7 ns at 140 MHz, and 6 ns at 167 MHz
27 mm × 27 mm, 429-Pin BGA (GLP)
1.9 V Core
3.3 V I/O
functional and CPU block diagram
SDRAM
SBSRAM
SRAM
ROM/FLASH
I/O Devices
Framing Chips:
H.100, MVIP,
SCSA, T1, E1
AC97 Devices,
SPI Devices,
Codecs
32
External Memory
Interface (EMIF)
Timer 0
Timer 1
Multichannel
Buffered Serial
Port 0
Multichannel
Buffered Serial
Port 1
’C6701 Digital Signal Processor
Program
Access/Cache
Controller
Internal Program Memory
1 Block Program/Cache
(64K Bytes)
’C67x CPU
Instruction Fetch
Instruction Dispatch
Instruction Decode
Data Path A
Data Path B
A Register File
B Register File
Control
Registers
Control
Logic
Test
In-Circuit
Emulation
.L1† .S1† .M1† .D1
.D2 .M2† .S2† .L2† ^Interrupt
Control
HOST CONNECTION
MC68360 Glueless
MPC860 Glueless
PCI9050 Bridge + Inverter ¹⁶
MC68302 + PAL
MPC750 + PAL
MPC960 (Jx/Rx) + PAL
Host Port
Interface
(HPI)
Direct Memory
Access Controller
(DMA)
(4 Channels)
PLL
(x1, x4)
Power-
Down
Logic
Data
Access
Controller
† _{These functional units execute floating-point instructions.}
Internal Data
Memory
(64K Bytes)
2 Blocks of 8 Banks
Each
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