BQ24171_15 Datasheet, PDF (5/39 Pages) Texas Instruments – bq24171 JEITA-Compliant Stand-Alone, Switched-Mode Li-Ion and Li-Polymer Battery Charger With Integrated MOSFETs and Power Path Selector

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PIN
NAME
NO.
ISET
13
OVPSET
18
PGND
PVCC
REGN
SRN
SRP
STAT
22,23
2,3
20
15
16
9
SW
1,24
TS
10
TTC
11
VREF
12
bq24171
SLUSAF2C – FEBRUARY 2011 – REVISED APRIL 2015
Pin Functions (continued)
TYPE
DESCRIPTION
I Fast charge current set point. Use a voltage divider from VREF to ISET to AGND to set the fast charge
current:
I_CHG
=
V_ISET
20 ´ R_SR
The precharge and termination current is internally as one tenth of the charge current. The charger is
disabled when ISET pin voltage is below 40 mV and enabled when ISET pin voltage is above 120 mV.
I Valid input voltage set point. Use a voltage divider from input to OVPSET to AGND to set this voltage.
The voltage above internal 1.6-V reference indicates input overvoltage, and the voltage below internal
0.5-V reference indicates input undervoltage. In either condition, charge terminates, and input NMOS pair
ACFET/RBFET turn off. LED driven by STAT pin keeps blinking, reporting fault condition.
P Power ground. Ground connection for high-current power converter node. On PCB layout, connect
directly to ground connection of input and output capacitors of the charger. Only connect to AGND
through the Thermal Pad underneath the IC.
P Charger input voltage. Connect at least 10-µF ceramic capacitor from PVCC to PGND and place it as
close as possible to IC.
P PWM low-side driver positive 6-V supply output. Connect a 1-μF ceramic capacitor from REGN to PGND
pin, close to the IC. Generate high-side driver bootstrap voltage by integrated diode from REGN to BTST.
I Charge current sense resistor negative input. A 0.1-μF ceramic capacitor is placed from SRN to SRP to
provide differential-mode filtering. A 0.1-μF ceramic capacitor is placed from SRN pin to AGND for
common-mode filtering.
I/P Charge current sense resistor, positive input. A 0.1-μF ceramic capacitor is placed from SRN to SRP to
provide differential-mode filtering. A 0.1-μF ceramic capacitor is placed from SRP pin to AGND for
common-mode filtering.
O Open-drain charge status pin with 10-kΩ pullup to power rail. The STAT pin can be used to drive LED or
communicate with the host processor. It indicates various charger operations: LOW when charge in
progress. HIGH when charge is complete or in SLEEP mode. Blinking at 0.5 Hz when fault occurs,
including charge suspend, input overvoltage, timer fault and battery absent.
P Switching node, charge current output inductor connection. Connect the 0.047-µF bootstrap capacitor
from SW to BTST.
I Temperature qualification voltage input. Connect a negative temperature coefficient thermistor. Program
the hot and cold temperature window with a resistor divider from VREF to TS to AGND. The 103AT
thermistor is recommended.
I Safety Timer and termination control. Connect a capacitor from this node to AGND to set the fast charge
safety timer(5.6 min/nF). Precharge timer is internally fixed to 30 minutes. Pull the TTC to LOW to disable
the charge termination and safety timer. Pull the TTC to HIGH to disable the safety timer but allow the
charge termination.
P 3.3-V reference voltage output. Place a 1-μF ceramic capacitor from VREF to AGND pin close to the IC.
This voltage could be used for programming ISET and ACSET and TS pins.
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