BQ24171_15 Datasheet, PDF (29/39 Pages) Texas Instruments – bq24171 JEITA-Compliant Stand-Alone, Switched-Mode Li-Ion and Li-Polymer Battery Charger With Integrated MOSFETs and Power Path Selector

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bq24171
SLUSAF2C – FEBRUARY 2011 – REVISED APRIL 2015
11 Power Supply Recommendations
In order to provide an output voltage on SYS, the bq24170/bq24172 requires a power supply from 4.5-V to 17-V
input with ideally >500-mA current rating connected to VBUS; or, a single-cell Li-Ion battery with voltage >
VBATUVLO connected to BAT.
12 Layout
12.1 Layout Guidelines
The switching node rise and fall times should be minimized for minimum switching loss. Proper layout of the
components to minimize the high-frequency current path loop (see Figure 24) is important to prevent electrical
and magnetic field radiation and high-frequency resonant problems. The following is a PCB layout priority list for
proper layout. Layout of the PCB according to this specific order is essential.
1. Place the input capacitor as close as possible to the PVCC supply and ground connections and use the
shortest copper trace connection. These parts should be placed on the same layer of the PCB instead of on
different layers and using vias to make this connection.
2. Place the inductor input terminal as close as possible to the SW terminal. Minimize the copper area of this
trace to lower electrical and magnetic field radiation but make the trace wide enough to carry the charging
current. Do not use multiple layers in parallel for this connection. Minimize parasitic capacitance from this
area to any other trace or plane.
3. The charging current sensing resistor should be placed right next to the inductor output. Route the sense
leads connected across the sensing resistor back to the IC in the same layer, close to each other (minimize
loop area) and do not route the sense leads through a high-current path (see Figure 25 for Kelvin connection
for best current accuracy). Place decoupling capacitor on these traces next to the IC.
4. Place the output capacitor next to the sensing resistor output and ground.
5. Output capacitor ground connections must be tied to the same copper that connects to the input capacitor
ground before connecting to system ground.
6. Route analog ground separately from power ground and use a single ground connection to tie charger power
ground to charger analog ground. Just beneath the IC use analog ground copper pour but avoid power pins
to reduce inductive and capacitive noise coupling. Use the thermal pad as a single ground connection point
to connect analog ground and power ground together, or use a 0-Ω resistor to tie analog ground to power
ground. A star-connection under the thermal pad is highly recommended.
7. It is critical to solder the exposed thermal pad on the backside of the IC package to the PCB ground. Ensure
that there are sufficient thermal vias directly under the IC, connecting to the ground plane on the other layers.
8. Decoupling capacitors must be placed next to the IC pins and make trace connection as short as possible.
9. The number and physical size of the vias must be enough for a given current path.
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