BQ24171_15 Datasheet, PDF (4/39 Pages) Texas Instruments – bq24171 JEITA-Compliant Stand-Alone, Switched-Mode Li-Ion and Li-Polymer Battery Charger With Integrated MOSFETs and Power Path Selector

bq24171
SLUSAF2C – FEBRUARY 2011 – REVISED APRIL 2015
7 Pin Configuration and Functions
RGY Package
24-Pin VQFN
Top View
PVCC ²
PVCC ³
AVCC ⁴
ACN ⁵
ACP ⁶
CMSRC ⁷
ACDRV ⁸
STAT ⁹
TS ¹⁰
TTC ¹¹
1
24
AGND
12
13
23 _PGND
22 _PGND
21 _BTST
20 _REGN
19 _BATDRV
18 _OVPSET
17 _ACSET
16 _SRP
15 _SRN
14 _FB
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PIN
NAME
NO.
ACDRV
8
ACN
5
ACP
6
ACSET
17
AGND
AVCC
Thermal
Pad
4
BATDRV
19
BTST
21
CMSRC
7
FB
14
Pin Functions
TYPE
DESCRIPTION
O AC adapter to system switch driver output. Connect to 4-kΩ resistor then to the gate of the ACFET N-
channel power MOSFET and the reverse conduction blocking N-channel power MOSFET. Connect both
FETs as common-source. The internal gate drive is asymmetrical, allowing a quick turnoff and slower
turnon in addition to the internal break-before-make logic with respect to the BATDRV.
I Adapter current sense resistor negative input. A 0.1-µF ceramic capacitor is placed from ACN to ACP to
provide differential-mode filtering. An optional 0.1-µF ceramic capacitor is placed from ACN pin to AGND
for common-mode filtering.
P/I Adapter current sense resistor positive input. A 0.1-µF ceramic capacitor is placed from ACN to ACP to
provide differential-mode filtering. A 0.1-µF ceramic capacitor is placed from ACP pin to AGND for
common-mode filtering.
I Input current set point. Use a voltage divider from VREF to ACSET to AGND to set this value:
I_DPM
=
V_ACSET
20 ´ R_AC
P Exposed pad beneath the IC. Always solder Thermal Pad to the board, and have vias on the Thermal
Pad plane star-connecting to AGND and ground plane for high-current power converter. It dissipates the
heat from the IC.
P IC power positive supply. Place a 1-µF ceramic capacitor from AVCC to AGND and place it as close as
possible to IC. Place a 10-Ω resistor from input side to AVCC pin to filter the noise. For 5-V input, a 5-Ω
resistor is recommended.
O Battery discharge MOSFET gate driver output. Connect to 1-kΩ resistor to the gate of the BATFET P-
channel power MOSFET. Connect the source of the BATFET to the system load voltage node. Connect
the drain of the BATFET to the battery pack positive node. The internal gate drive is asymmetrical to
allow a quick turnoff and slower turnon, in addition to the internal break-before-make logic with respect to
ACDRV.
P PWM high-side driver positive supply. Connect the 0.047-µF bootstrap capacitor from SW to BTST.
O Connect to common source of N-channel ACFET and reverse blocking MOSFET (RBFET). Place 4-kΩ
resistor from CMSRC pin to the common source of ACFET and RBFET to control the turnon speed. The
resistance between ACDRV and CMSRC should be 500-kΩ or bigger.
I Charge voltage analog feedback adjustment. Connect the output of a resistor divider powered from the
battery terminals to FB to AGND. Output voltage is regulated to 2.1 V on FB pin during constant-voltage
mode.
4
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