TMS320C6748_1 Datasheet, PDF (48/254 Pages) Texas Instruments – Fixed/Floating-Point DSP

TMS320C6748 Fixed/Floating-Point DSP
SPRS590A – JUNE 2009 – REVISED AUGUST 2009
3.8.18 Ethernet Media Access Controller (EMAC)
www.ti.com
Table 3-21. Ethernet Media Access Controller (EMAC) Terminal Functions
SIGNAL
NAME
NO.
AXR6 / CLKR0 / GP1[14] / MII_TXEN / PRU0_R31[6] C1
AXR5 / CLKX0 / GP1[13] / MII_TXCLK
D3
AXR4 / FSR0 / GP1[12] / MII_COL
D1
AXR3 / FSX0 / GP1[11] / MII_TXD[3]
E3
AXR2 / DR0 / GP1[10] / MII_TXD[2]
E2
AXR1 / DX0 / GP1[9] / MII_TXD[1]
E1
AXR0 / ECAP0_APWM0 / GP8[7] / MII_TXD[0] /
CLKS0
F3
EPWMSYNCI / GP8[6] / MII_RXER
C16
SPI0_SIMO /EPWMSYNCO / GP8[5] / MII_CRS
C18
SPI0_CLK / EPWM0A / GP1[8] / MII_RXCLK
D19
SPI0_ENA / EPWM0B / PRU0_R30[6] /MII_RXDV
C17
SPI0_SCS[5] /UART0_RXD / GP8[4] / MII_RXD[3]
C19
SPI0_SCS[4] /UART0_TXD / GP8[3] / MII_RXD[2]
D18
SPI0_SCS[3] /UART0_CTS / GP8[2] / MII_RXD[1] /
SATA_MP_SWITCH
E17
SPI0_SCS[2] /UART0_RTS / GP8[1] / MII_RXD[0] /
SATA_CP_DET
D16
VP_DIN[1] / UHPI_HD[9] / UPP_D[9] /
RMII_MHZ_50_CLK / PRU0_R31[23]
W18
VP_DIN[2] / UHPI_HD[10] / UPP_D[10] / RMII_RXER /
PRU0_R31[24]
W17
VP_DIN[3] / UHPI_HD[11] / UPP_D[11] / RMII_RXD[0]
/ PRU0_R31[25]
V17
VP_DIN[4] / UHPI_HD[12] / UPP_D[12] /
RMII_RXD[1]/PRU0_R31[26]
W16
VP_DIN[0] / UHPI_HD[8] / UPP_D[8] / RMII_CRS_DV/
PRU1_R31[29]
W19
VP_DIN[5] / UHPI_HD[13] / UPP_D[13] /
RMII_TXEN/PRU0_R31[27]
R14
VP_DIN[6] / UHPI_HD[14] / UPP_D[14] /
RMII_TXD[0]/ PRU0_R31[28]
V16
VP_DIN[7] / UHPI_HD[15] / UPP_D[15] /
RMII_TXD[1]/ PRU0_R31[29]
U18
SPI0_SCS[0] /TM64P1_OUT12 / GP1[6] / MDIO_D /
TM64P1_IN12
D17
TYPE ⁽¹⁾
MII
O
I
I
O
O
O
O
I
I
I
I
I
I
I
I
RMII
I/O
I
I
I
I
O
O
O
MDIO
I/O
PULL ⁽²⁾
CP[5]
CP[5]
CP[5]
CP[5]
CP[5]
CP[5]
CP[6]
CP[7]
CP[7]
CP[7]
CP[7]
CP[8]
CP[8]
CP[9]
CP[9]
CP[26]
CP[26]
CP[26]
CP[26]
CP[26]
CP[26]
CP[26]
CP[26]
CP[10]
POWER
GROUP ⁽³⁾
DESCRIPTION
A
EMAC MII Transmit enable output
A
EMAC MII Transmit clock input
A
EMAC MII Collision detect input
A
A
A
EMAC MII transmit data
A
A
EMAC MII receive error input
A
EMAC MII carrier sense input
A
EMAC MII receive clock input
A
EMAC MII receive data valid input
A
A
A
EMAC MII receive data
A
C
EMAC 50-MHz clock input or output
C
EMAC RMII receiver error
C
EMAC RMII receive data
C
C
EMAC RMII carrier sense data valid
C
EMAC RMII transmit enable
C
EMAC RMII transmit data
C
A
MDIO serial data
(1) I = Input, O = Output, I/O = Bidirectional, Z = High impedance, PWR = Supply voltage, GND = Ground, A = Analog signal.
Note: The pin type shown refers to the input, output or high-impedance state of the pin function when configured as the signal name
highlighted in bold. All multiplexed signals may enter a high-impedance state when the configured function is input-only or the configured
function supports high-Z operation. All GPIO signals can be used as input or output. For multiplexed pins where functions have different
types (ie., input versus output), the table reflects the pin function direction for that particular peripheral.
(2) IPD = Internal Pulldown resistor; IPU = Internal Pullup resistor; CP[n] = configurable pull-up/pull-down (where n is the pin group) using
the PUPDENA and PUPDSEL registers in the System Module. The pull-up and pull-down control of these pins is not active until the
device is out of reset. During reset, all of the pins associated with these registers are weakly pulled down. If the application requires a
pull-up, an external pull-up can be used.
(3) This signal is part of a dual-voltage IO group (A, B or C). These groups can be operated at 3.3V or 1.8V nominal. The three groups can
be operated at independent voltages but all pins withina group will operate at the same voltage. Group A operates at the voltage of
power supply DVDD3318_A. Group B operates at the voltage of power supply DVDD3318_B. Group C operates at the voltage of power
supply DVDD3318_C.
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Device Overview
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