AMC7812SPAPR Datasheet, PDF (46/92 Pages) Texas Instruments – 12-Bit Analog Monitoring and Control Solution with Multichannel ADC, DACs, and Temperature Sensors

AMC7812
SBAS513E – JANUARY 2011 – REVISED SEPTEMBER 2013
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ALARM pin
The ALARM pin is a global alarm indicator. ALARM is an open-drain pin, as Figure 97 illustrates; an external
pull-up resistor is required. When the pin is activated, it goes low. When the pin is inactive, it is in Hi-Z status.
The ALARM pin works as an interrupt to the host so that it may query the Status Register to determine the alarm
source. Any alarm event (including analog inputs, temperatures, diode status, and device thermal condition)
activates the pin if the alarm is not masked (the corresponding EALR bit in the Alarm Control Register = '1').
When the alarm pin is masked (EN-ALARM bit = '0'), the occurrence of the event sets the corresponding status
bit in Status Register to '1', but does not activate the ALARM pin.
CH0-ALR Bit
EALR-CH0 Bit
ALARM
D2-FAIL-ALR Bit
EALR-D2-FAIL Bit
THERM-ALR Bit
G1
EN-ALARM Bit
Figure 97. ALARM Pin
When the ALARM-LATCH-DIS bit in the Alarm Control Register is cleared ('0'), the alarm is latched. Reading the
Status Register clears the alarm status bit. Whenever an alarm status bit is set, indicating an alarm condition, it
remains set until the event that caused it is resolved and the Status Register is read. The alarm bit can only be
cleared by reading the Status Register after the event is resolved, or by hardware reset, software reset, or
power-on reset (POR). All bits are cleared when reading the Status Register, and all bits are reasserted if the
out-of limit condition still exists after the next conversion cycle, unless otherwise noted. When the ALARM-
LATCH-DIS bit in the Alarm Control Register is set ('1'), the ALARM pin is not latched. The alarm bit clears to '0'
when the error condition subsides, regardless of whether the bit is read or not.
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