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AMC7812SPAPR Datasheet, PDF (4/92 Pages) Texas Instruments – 12-Bit Analog Monitoring and Control Solution with Multichannel ADC, DACs, and Temperature Sensors
AMC7812
SBAS513E – JANUARY 2011 – REVISED SEPTEMBER 2013
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
At TA = –40°C to +105°C, AVDD = DVDD = 4.5V to 5.5V, AVCC = +15V, AGND = DGND = 0V, IOVDD = 2.7V to 5.5V, internal
2.5V reference, and the DAC output span = 0V to 5V, unless otherwise noted.
AMC7812
PARAMETER
TEST CONDITIONS
MIN TYP
MAX UNIT
INTERNAL REFERENCE
Output voltage
Output impedance
TA = +25°C, REF-OUT pin
2.495
2.5
0.4
2.505 V
Ω
Reference temperature coefficient
10
25 ppm/°C
Output current (sourcing/sinking)
±5
mA
Output voltage noise
ADC PERFORMANCE
TA = +25°C, f = 1kHz
f = 0.1Hz to 10Hz
260
nV/√Hz
13
µVPP
ADC DC ACCURACY (for AVDD = 5V)
Resolution
12
Bits
INL
Integral nonlinearity
±0.5
±1 LSB
DNL
Differential nonlinearity
±0.5
±1 LSB
Single-Ended Mode
Offset error
±1
±3 LSB
Offset error match
±0.4
LSB
Gain error
External reference
±1
±5 LSB
Gain error match
±0.4
LSB
Differential Mode
Gain error
Gain error match
External reference, 0V to (2 · VREF) mode, VCM =
2.5V
External reference, 0V to VREF mode,
VCM = 1.25V
±2
±5 LSB
±1
±5 LSB
±0.5
LSB
Zero code error
Zero code error match
0V to (2 · VREF) mode, VCM = 2.5V
External reference, 0V to VREF mode,
VCM = 1.25V
±1
±3 LSB
±1
±3 LSB
±0.5
LSB
Common mode rejection
SAMPLING DYNAMICS
DC, 0V to (2 · VREF) mode
67
dB
Conversion rate
Conversion time(4)
Autocycle update rate(4)
External single analog channel, auto mode
External single analog channel, direct mode
External single analog channel
All 16 single-ended inputs enabled
500
kSPS
167
kSPS
2
µs
32
µs
Throughput rate
ANALOG INPUT(5)
SPI clock 12MHz or greater, single channel
500 kSPS
Full-scale input voltage
Absolute input voltage
Input capacitance(4)
Single-ended, 0V to VREF
Single-ended, 0V to (2 · VREF)
VIN+ – VIN-, fully-differential, 0V to VREF
VIN+ – VIN-, fully-differential, 0V to (2 · VREF)
0V to VREF mode
0V to (2 · VREF) mode
0
0
–VREF
–2 · VREF
GND - 0.2
VREF
V
2 · VREF
V
+VREF
V
2 · VREF
V
AVDD + 0.2
V
118
pF
73
DC input leakage current
Unselected ADC input
±10 µA
(4) Sampled during initial release to ensure compliance; not subject to production testing.
(5) VIN+ or VIN– must remain within GND - 0.2V and AVDD + 0.2V. See Analog Inputs section.
4
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