DAC38J82_15 Datasheet, PDF (42/119 Pages) Texas Instruments – DAC3xJ82 Dual-Channel, 16-Bit, 1.6/2.5 GSPS, Digital-to-Analog Converters with 12.5 Gbps JESD204B Interface

DAC37J82, DAC38J82
SLASE16B – JANUARY 2014 – REVISED MAY 2014
mem_sfrac_sel_ab
mem_lfrac_sel_ab
A_in
Small
Fractional
Delay FIR
mem_sfrac_ena_ab
B_in
Matched
Delay Line
Large
Fractional
Delay FIR
mem_lfrac_ena_ab
Large
Fractional
Delay FIR
www.ti.com
Integer
Delay
A_out
mem_output_delayab
Integer
Delay
B_out
mem_sfrac_sel_ab
mem_sfrac_sel_ab
mem_lfrac_sel_ab
mem_lfrac_sel_ab
C_in
Small
Fractional
Delay FIR
mem_sfrac_ena_ab
D_in
Matched
Delay Line
Large
Fractional
Delay FIR
mem_lfrac_ena_ab
Large
Fractional
Delay FIR
Integer
Delay
C_out
mem_output_delaycd
Integer
Delay
D_out
mem_sfrac_sel_ab
mem_lfrac_sel_ab
Figure 73. Diagram of Group Delay Correction
mem_output_delaycd
7.3.16.1 Fine Fractional Delay FIR Filter
The coefficients of the FIR filters for small fractional delay are programmable to user defined values which allows
users to implement their own filter transfer functions. Filter designs supporting group delay variation in the range
[0.002 0.198]×Tdac, where T is the time period of DAC Clock, is listed in Table 16. The bit widths of all
coefficients are fixed, which puts limits on the range of values each coefficient can acquire.
Table 15. Small Fractional Delay FIR Coefficient Range
COEFFICIENT
C0
C1
C2
C3
C4
RANGE
[–2,1]
[–16,15]
[–128,127]
[–512,511]
[–262144,262143]
42
Submit Documentation Feedback
Product Folder Links: DAC37J82 DAC38J82
Copyright © 2014, Texas Instruments Incorporated