TDC7200_15 Datasheet, PDF (41/50 Pages) Texas Instruments – TDC7200 Time-to-Digital Converter for Time-of-Flight Applications in LIDAR,Magnetostrictive and Flow Meters

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TDC7200
SNAS647C – FEBRUARY 2015 – REVISED AUGUST 2015
10 Power Supply Recommendations
The analog circuitry of the TDC7200 is designed to operate from an input voltage supply range between 2 V and
3.6 V. It is recommended to place a 100 nF ceramic bypass capacitor to ground as close as possible to the VDD
pins. In addition, an electrolytic or tantalum capacitor with value greater than 1 µF is recommended. The bulk
capacitor does not need to be in close vicinity with the TDC7200 and could be close to the voltage source
terminals or at the output of the voltage regulators powering the TDC7200.
11 Layout
11.1 Layout Guidelines
• In a 4-layer board design, the recommended layer stack order from top to bottom is: signal, ground, power
and signal.
• Bypass capacitors should be placed in close proximity to the VDD pin.
• The length of the START and STOP traces from the TDC7200 to the stopwatch/MCU should be matched to
prevent uneven signal delays. Also, avoid unnecessary via-holes on these traces and keep the routing as
short/direct as possible to minimize parasitic capacitance on the PCB.
• Route the SPI signal traces close together. Place a series resistor at the source of DOUT (close to the
TDC7200) and series resistors at the sources of DIN, SCLK, and CSB (close to the master MCU).
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