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TLC2543-EP Datasheet, PDF (4/25 Pages) Texas Instruments – 12-BIT ANALOG-TO-DIGITAL CONVERTER WITH SERIAL CONTROL AND 11 ANALOG INPUTS
TLC2543-EP
12-BIT ANALOG-TO-DIGITAL CONVERTER
WITH SERIAL CONTROL AND 11 ANALOG INPUTS
SGLS125A – JULY 2002 – REVISED NOVEMBER 2006
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
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VCC Supply voltage range(2)
VI Input voltage range (any input)
VO Output voltage range
Vref+ Positive reference voltage
Vref– Negative reference voltage
II
Peak input current (any input)
II
Peak total input current (all inputs)
TA Operating free-air temperature range
Tstg Storage temperature range
Lead temperature 1,6 mm (1/16 in) from the case for 10 s
TLC2543Q
TLC2543M
MIN
MAX UNIT
–0.5
6.5 V
–0.3
VCC +
0.3
V
–0.3
VCC +
0.3
V
VCC +
0.1
V
–0.1 V
±20 mA
±30 mA
–40
125
°C
-55
125
–65
150 °C
260 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to the GND terminal with REF– and GND wired together (unless otherwise noted).
Recommended Operating Conditions
VCC
Vref+
Vref–
Vref+ – Vref–
VIH
VIL
tsu(A)
th(A)
th(CS)
tsu(CS)
twH(I/O)
twL(I/O)
tt(I/O)
tt(CS)
TA
Supply voltage
Positive reference voltage(1)
Negative reference voltage(1)
Differential reference voltage(1)
Analog input voltage(1)
High-level control input voltage
Low-level control input voltage
Clock frequency at I/O CLOCK
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
Setup time, address bits at DATA INPUT before I/O CLOCK↑ (see Figure 4)
Hold time, address bits after I/O CLOCK↑ (see Figure 4)
Hold time, CS low after last I/O CLOCK↓ (see Figure 5)
Setup time, CS low before clocking in first address bit(2) (see Figure 5)
Pulse duration, I/O CLOCK high
Pulse duration, I/O CLOCK low
Transition time, I/O CLOCK high to low(3) (see Figure 6)
Transition time, DATA INPUT and CS
Operating free-air temperature
TLC2543Q
TLC2543M
MIN
4.5
2.5
0
2
0
100
0
0
1.425
120
120
–40
-55
NOM
5
VCC
0
VCC
MAX
5.5
VCC + 0.1
VCC
0.8
4.1
1
10
125
125
UNIT
V
V
V
V
V
V
V
MHz
ns
ns
ns
µs
ns
ns
µs
µs
°C
(1) Analog input voltages greater than that applied to REF+ convert as all ones (111111111111), while input voltages less than that applied
to REF– convert as all zeros (000000000000).
(2) To minimize errors caused by noise at the CS input, the internal circuitry waits for a setup time after CS↓ before responding to control
input signals. No attempt should be made to clock in an address until the minimum CS setup time has elapsed.
(3) This is the time required for the clock input signal to fall from VIHmin to VILmax or to rise from VILmax to VIHmin. In the vicinity of normal
room temperature, the devices function with input clock transition time as slow as 1 µs for remote data acquisition applications where
the sensor and the ADC are placed several feet away from the controlling microprocessor.
4
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