LM3489_15 Datasheet, PDF (4/25 Pages) Texas Instruments – Hysteretic PFET Buck Controller With Enable Pin

LM3489
LM3489-Q1
SNVS443B – MAY 2006 – REVISED FEBRUARY 2013
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Electrical Characteristics ⁽¹⁾⁽²⁾
Specifications in Standard type face are for T_J = 25°C, and in bold type face apply over the full Operating Temperature
Range (T_J = −40°C to +125°C). Unless otherwise specified, V_IN = 12V, V_ISNS = V_IN − 1V, and V_ADJ = V_IN − 1.1V. Datasheet
min/max specification limits are specified by design, test, or statistical analysis.
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
I_SHDN
V_EN
V_{EN_HYST}
I_Q
V_FB
(3)
Shutdown input supply current
Enable threshold voltage
Enable threshold hysteresis
Quiescent Current at ground pin
Feedback Voltage
EN = 0V
Enable rising
FB = 1.5V (Not Switching)
7
15
µA
1.15
1.5
1.85
V
130
mV
280
400
µA
1.223 1.239
1.255
V
1.214
1.264
V_HYST
Comparator Hysteresis
10
15
mV
14
20
V_{CL_OFFSET}
I_{CL_ADJ}
T_CL
R_PGATE
I_PGATE
I_FB ⁽⁴⁾
T_{ONMIN_NOR}
T_{ONMIN_CL}
%V_FB/ΔV_IN
Current limit comparator offset
Current limit ADJ current source
Current limit one shot off time
Driver resistance
Driver Output current
FB pin Bias Current
Minimum on time in normal
operation
Minimum on time in current limit
Feedback Voltage Line Regulation
V_FB = 1.0V
V_FB = 1.5V
V_ADJ = 11.5V
V_ISNS = 11.0V
V_FB = 1.0V
Source
I_SOURCE = 100mA
Sink
I_SINK = 100mA
Source
V_IN = 7V, PGATE = 3.5V
Sink
VIN = 7V, PGATE = 3.5V
V_FB = 1.0V
V_ISNS = V_ADJ + 0.1V
C_load on OUT = 1000pF⁽⁵⁾
V_ISNS = V_ADJ - 0.1V
V_FB = 1.0V
C_load on OUT = 1000pF⁽⁵⁾
4.5 ≤ V_IN ≤ 35V
-20
0
+20
mV
3.0
5.5
7.0
µA
6
9
14
µs
5.5
Ω
8.5
0.44
A
0.1
300
750
nA
100
ns
200
ns
0.01
%/V
(1) All limits are specified at room temperature (standard type face) and at temperature extremes (bold type face). All room temperature
limits are 100% tested. All limits at temperature extremes are specified via correlation using standard Statistical Quality Control (SQC)
methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
(2) Typical numbers are at 25°C and represent the most likely norm.
(3) The V_FB is the trip voltage at the FB pin when PGATE switches from high to low.
(4) Bias current flows out from the FB pin.
(5) A 1000pF capacitor is connected between V_IN and PGATE.
4
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