LM3489_15 Datasheet, PDF (2/25 Pages) Texas Instruments – Hysteretic PFET Buck Controller With Enable Pin

LM3489
LM3489-Q1
SNVS443B – MAY 2006 – REVISED FEBRUARY 2013
CONNECTION DIAGRAM
1
ISENSE
2
GND
3
EN
4
FB
8
VIN
7
PGATE
6
PGND
5
ADJ
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Figure 1. Top View
8-Lead Plastic VSSOP-8
Package Number (DGK)
PIN DESCRIPTIONS
Pin
Name
No.
Description
1
ISENSE
The current sense input pin. This pin should be connected to the PFET drain terminal directly or through a series
resistor up to 600 ohm for 28V>Vin>35V.
2
GND
Signal ground.
3
EN
Enable pin. Connect EN pin to ground to shutdown the part or float to enable operation (Internally pulled high).
This pin can also be used to perform UVLO function.
4
FB
The feedback input. Connect the FB to a resistor voltage divider between the output and GND for an adjustable
output voltage.
5
ADJ
Current limit threshold adjustment. Connected to an internal 5.5µA current source. A resistor is connected
between this pin and VIN. The voltage across this resistor is compared with the ISENSE pin voltage to determine
if an over-current condition has occurred.
6
PGND
Power ground.
7
PGATE
Gate Drive output for the external PFET. PGATE swings between VIN and VIN-5V.
8
VIN
Power supply input pin.
2
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