CD4051B-Q1 Datasheet, PDF (4/18 Pages) Texas Instruments – CMOS ALALOG MULTIPLEXERS/DEMULTIPLEXERS WITH LOGIC-LEVEL CONVERSION

CD4051BĆQ1, CD4052BĆQ1, CD4053BĆQ1
CMOS ANALOG MULTIPLEXERS/DEMULTIPLEXERS
WITH LOGIC-LEVEL CONVERSION
SCHS354 − AUGUST 2004
logic diagram (positive logic)
CD4051B
CHANNEL I/O
16 VDD
76543210
4 2 5 1 12 15 14 13
TG
TG
A† 11
TG
B† 10
Binary
TG
to
Logic-Level
Conversion
1-of-8
Decoder
TG
C† 9
With
Inhibit
TG
TG
INH† 6
TG
3
COM
OUT/IN
8 _VSS
7 _VEE
† _{All inputs are protected by CMOS protection network.}
CD4052B
16 VDD
A† ¹⁰
B† ⁹
INH† ⁶
Logic-Level
Conversion
Binary
to
1-of-4
Decoder
With
Inhibit
8 VSS
7 VEE
† _{All inputs are protected by CMOS protection network.}
X CHANNEL I/O
3210
11 15 14 12
TG
TG
TG
TG
TG
TG
TG
TG
1524
0123
Y CHANNEL I/O
13 ^{COM X}
OUT/IN
3
COM Y
OUT/IN
4
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