CD4051B-Q1 Datasheet, PDF (11/18 Pages) Texas Instruments – CMOS ALALOG MULTIPLEXERS/DEMULTIPLEXERS WITH LOGIC-LEVEL CONVERSION

VDD = 15 V
CD4051BĆQ1, CD4052BĆQ1, CD4053BĆQ1
CMOS ANALOG MULTIPLEXERS/DEMULTIPLEXERS
WITH LOGIC-LEVEL CONVERSION
SCHS354 − AUGUST 2004
PARAMETER MEASUREMENT INFORMATION
VDD = 7.5 V
VDD = 5 V
VDD = 5 V
5V
5V
16
7.5 V
16
16
16
VSS = 0 V
VSS = 0 V
VSS = 0 V
VEE = 0 V ₇
8
VSS = 0 V
(A)
VEE = –7.5 V
7
8
(B)
VEE = –10 V
7
8
(C)
VEE = –5 V
7
8
(D)
NOTE: The A, B, C, and INH input logic levels are L = VSS and H = VDD. The analog signal (through the TG) may swing from VEE to VDD.
Figure 9. Typical Bias-Voltage Test Circuits
10%
tr = 20 ns
90%
50%
90%
50%
90%
50%
Turn-On Time
10%
Turn-Off Time
tf = 20 ns
10%
10%
Figure 10. Channel Turned ON Waveforms
(R_L = 1 kΩ)
10%
tr = 20 ns
90%
50%
90%
50%
tf = 20 ns
10%
tPHZ
90%
Turn-Off Time
10%
Turn-On Time
Figure 11. Channel Turned OFF Waveforms
(R_L = 1 kΩ)
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