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BQ24190_15 Datasheet, PDF (4/52 Pages) Texas Instruments – bq2419x I2C Controlled 4.5-A Single Cell USB/Adapter Charger with Narrow VDC Power Path Management and USB OTG
bq24190, bq24192, bq24192I
SLUSAW5B – JANUARY 2012 – REVISED DECEMBER 2014
7 Pin Configuration and Functions
RGE Package
24-Pin VQFN With Exposed Thermal Pad
(Top View)
www.ti.com
24 23 22 21 20 19
VBUS 1
D+ 2
D– 3
STAT 4
SCL 5
SDA 6
bq24190
18 PGND
17 PGND
16 SYS
15 SYS
14 BAT
13 BAT
7 8 9 10 11 12
24 23 22 21 20 19
VBUS 1
PSEL 2
PG 3
STAT 4
SCL 5
SDA 6
bq24192
bq24192I
18 PGND
17 PGND
16 SYS
15 SYS
14 BAT
13 BAT
7
8
9 10 11 12
Blue pins indicate difference in pin names/functionality between devices.
PIN
bq24190
bq24192
bq24192I
VBUS
VBUS
D+
–
–
PSEL
D–
–
–
PG
STAT
STAT
SCL
SDA
INT
SCL
SDA
INT
OTG
OTG
CE
CE
NUMBER
1,24
2
2
3
3
4
5
6
7
8
9
Pin Functions
TYPE
DESCRIPTION
Charger Input Voltage. The internal n-channel reverse block MOSFET (RBFET) is connected between VBUS
P and PMID with VBUS on source. Place a 1-µF ceramic capacitor from VBUS to PGND and place it as close as
possible to IC. (Refer to Application Information Section for details)
I Positive line of the USB data line pair. D+/D– based USB host/charging port detection. The detection includes
Analog data contact detection (DCD) and primary detection in bc1.2.
I
Digital
Power source selection input. High indicates a USB host source and Low indicates an adapter source.
I Negative line of the USB data line pair. D+/D– based USB host/charging port detection. The detection includes
Analog data contact detection (DCD) and primary detection in bc1.2.
O
Digital
Open drain active low power good indicator. Connect to the pull up rail via 10-kΩ resistor. LOW indicates a
good input source if the input voltage is between UVLO and ACOV, above SLEEP mode threshold, and current
limit is above 30 mA.
O
Digital
Open drain charge status output to indicate various charger operation. Connect to the pull up rail via 10-kΩ.
LOW indicates charge in progress. HIGH indicates charge complete or charge disabled. When any fault
condition occurs, STAT pin in bq24190, bq24192 blinks at 1 Hz, and STAT pin in bq24192I has a 10-kΩ
resistor to ground.
I
Digital
I2C Interface clock. Connect SCL to the logic rail through a 10-kΩ resistor.
I/O
Digital
I2C Interface data. Connect SDA to the logic rail through a 10-kΩ resistor.
O Open-drain Interrupt Output. Connect the INT to a logic rail via 10-kΩ resistor. The INT pin sends active low,
Digital 256-us pulse to host to report charger device status and fault.
USB current limit selection pin during buck mode, and active high enable pin during boost mode.
I In buck mode with USB host (PSEL=High), when OTG = High, IIN limit = 500 mA and when OTG = Low, IIN
Digital limit = 100 mA.
The boost mode is activated when the REG01[5:4] = 10 and OTG pin is High.
I Active low Charge Enable pin. Battery charging is enabled when REG01[5:4] = 01 and CE pin = Low. CE pin
Digital must be pulled high or low.
4
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