CC2550 Datasheet, PDF (34/50 Pages) Texas Instruments – Single Chip Low Cost Low Power RF-Transmitter

CC2550
Address
0x01
0x02
0x03
0x04
0x05
0x06
0x08
0x09
0x0A
0x0D
0x0E
0x0F
0x10
0x11
0x12
0x13
0x14
0x15
0x17
0x18
0x22
0x23
0x24
0x25
0x26
0x29
0x2A
0x2C
0x2D
0x2E
Register
IOCFG1
IOCFG0
FIFOTHR
SYNC1
SYNC0
PKTLEN
PKTCTRL0
ADDR
CHANNR
FREQ2
FREQ1
FREQ0
MDMCFG4
MDMCFG3
MDMCFG2
MDMCFG1
MDMCFG0
DEVIATN
MCSM1
MCSM0
FREND0
FSCAL3
FSCAL2
FSCAL1
FSCAL0
FSTEST
PTEST
TEST2
TEST1
TEST0
Description
GDO1 output pin configuration
GDO0 output pin configuration
FIFO threshold
Sync word, high byte
Sync word, low byte
Packet length
Packet automation control
Device address
Channel number
Frequency control word, high byte
Frequency control word, middle byte
Frequency control word, low byte
Modulator configuration
Modulator configuration
Modulator configuration
Modulator configuration
Modulator configuration
Modulator deviation setting
Main Radio Control State Machine configuration
Main Radio Control State Machine configuration
Front end TX configuration
Frequency synthesizer calibration
Frequency synthesizer calibration
Frequency synthesizer calibration
Frequency synthesizer calibration
Frequency synthesizer calibration control
Production test
Various test settings
Various test settings
Various test settings
Details on page number
36
36
36
37
37
37
37
38
38
38
38
38
38
39
40
41
41
41
42
42
43
43
44
44
44
44
44
45
45
45
Table 25: Configuration Registers Overview
Address
0x30 (0xF0)
0x31 (0xF1)
0x35 (0xF5)
0x38 (0xF8)
0x39 (0xF9)
0x3A (0xFA)
Register
PARTNUM
VERSION
MARCSTATE
PKTSTATUS
VCO_VC_DAC
TXBYTES
Description
Part number for CC2550
Current version number
Control state machine state
Current GDOx status and packet status
Current setting from PLL calibration module
Underflow and number of bytes in the TX FIFO
Details on page number
45
45
46
46
46
47
Table 26: Status Registers Overview
Preliminary Data Sheet (rev. 1.1) SWRS039
Page 34 of 51