CC2550 Datasheet, PDF (22/50 Pages) Texas Instruments – Single Chip Low Cost Low Power RF-Transmitter

CC2550
22 Forward Error Correction with Interleaving
22.1 Forward Error Correction (FEC)
CC2550 has built in support for Forward Error
Correction (FEC) that can be used with CC2500
at the receiver end. To enable this option, set
MDMCFG1.FEC_EN to 1. FEC is employed on
the data field and CRC word in order to reduce
the gross bit error rate when operating near
the sensitivity limit. Redundancy is added to
the transmitted data in such a way that the
receiver can restore the original data in the
presence of some bit errors.
The use of FEC allows correct reception at a
lower SNR, thus extending communication
range. Alternatively, for a given SNR, using
FEC decreases the bit error rate (BER). As the
packet error rate (PER) is related to BER by:
PER = 1 − (1 − BER) ^{packet _ length} ,
a lower BER can be used to allow significantly
longer packets, or a higher percentage of
packets of a given length, to be transmitted
successfully. Finally, in realistic ISM radio
environments, transient and time-varying
phenomena will produce occasional errors
even in otherwise good reception conditions.
FEC will mask such errors and, combined with
interleaving of the coded data, even correct
relatively long periods of faulty reception (burst
errors).
The FEC scheme adopted for CC2550 is
convolutional coding, in which n bits are
generated based on k input bits and the m
most recent input bits, forming a code stream
able to withstand a certain number of bit errors
between each coding state (the m-bit window).
The convolutional coder is a rate 1/2 code with
a constraint length of m=4. The coder codes
one input bit and produces two output bits;
hence, the effective data rate is halved.
1) Storing coded
data
2) Transmitting
interleaved data
22.2 Interleaving
Data received through real radio channels will
often experience burst errors due to
interference and time-varying signal strengths.
In order to increase the robustness to errors
spanning multiple bits, interleaving is used
when FEC is enabled. After de-interleaving, a
continuous span of errors in the received
stream will become single errors spread apart.
CC2550 employs matrix interleaving, which is
illustrated in Figure 9. The on-chip interleaving
and de-interleaving buffers are 4 x 4 matrices.
In the transmitter, the data bits are written into
the rows of the matrix, whereas the bit
sequence to be transmitted is read from the
columns of the matrix and fed to the rate ½
convolutional coder. Conversely, in a CC2500
receiver, the received symbols are written into
the columns of the matrix, whereas the data
passed onto the convolutional decoder is read
from the rows of the matrix.
When FEC and interleaving is used, the
amount of data transmitted over the air must
be a multiple of the size of the interleaver
buffer (two bytes). In addition, at least one
extra byte is required for trellis termination.
The packet control hardware therefore
automatically inserts one or two extra bytes at
the end of the packet, so that the total length
of the data to be interleaved is an even
number. Note that these extra bytes are
invisible to the user, as they are removed
before the received packet enters the RX FIFO
in a CC2500.
Due to the implementation of the FEC and
interleaver, the data to be interleaved must be
at least two bytes. One byte long fixed length
packets without CRC is therefore not
supported when FEC/interleaving is enabled.
3) Receiving
interleaved data
4) Passing on data
to decoder
TX
Data
Transmitter
Figure 9: General principle of matrix interleaving
Receiver
RX
Data
Preliminary Data Sheet (rev. 1.1) SWRS039
Page 22 of 51