CC2550 Datasheet, PDF (18/50 Pages) Texas Instruments – Single Chip Low Cost Low Power RF-Transmitter

CC2550
options the GDO1/SO pin will become a
generic pin. When CSn is low, the pin will
always function as a normal SO pin.
In the synchronous and asynchronous serial
modes, the GDO0 pin is used as a serial TX
data input pin while in transmit mode.
The GDO0 pin can also be used for an on-chip
analog temperature sensor. By measuring the
voltage on the GDO0 pin with an external ADC,
the temperature can be calculated.
19 Data Rate Programming
The data rate used when transmitting is
programmed by the MDMCFG3.DRATE_M and
the MDMCFG4.DRATE_E configuration
registers. The data rate is given by the formula
below. As the formula shows, the programmed
data rate depends on the crystal frequency.
( ) _{RDATA =}
256 + DRATE _ M
2²⁸
⋅ 2^{DRATE _ E} _{⋅ f XOSC}
The following approach can be used to find
suitable values for a given data rate:
DRATE
_
E
=
⎢
⎢^log
⎢⎣
2
⎜⎜⎝⎛
R_DATA ⋅ 2 ²⁰
f _XOSC
⎟⎟⎠⎞⎥⎥⎦⎥
DRATE _ M = ^{RDATA ⋅ 228} − 256
f _XOSC ⋅ 2 ^{DRATE _ E}
If DRATE_M is rounded to the nearest integer
and becomes 256, increment DRATE_E and
use DRATE_M=0.
Specifications for the temperature sensor are
found in section 9 on page 8.
The temperature sensor output is usually only
available when the frequency synthesizer is
enabled (e.g. the MANCAL, FSTXON and TX
states). It is necessary to write 0xBF to the
PTEST register to use the analog temperature
sensor in the IDLE state. Before leaving the
IDLE state, the PTEST register should be
restored to its default value (0x7F).
The data rate can be set from 1.2kbps to
500kbps with the minimum step size of:
Data rate
start
0.8kbps
3.17kbps
6.35kbps
12.7kbps
25.4kbps
50.8kbps
101.6kbps
203.1kbps
406.3kbps
Typical data
rate
1.2, 2.4kbps
4.8kbps
9.6kbps
19.6kbps
38.4kbps
76.8kbps
153.6kbps
250kbps
500kbps
Data rate
stop
3.17kbps
6.35kbps
12.7kbps
25.4kbps
50.8kbps
101.6kbps
203.1kbps
406.3kbps
500kbps
Data rate
step size
0.0062kbps
0.0124kbps
0.0248kbps
0.0496kbps
0.0992kbps
0.1984kbps
0.3967kbps
0.7935kbps
1.5869kbps
Table 16: Data rate step size
20 Packet Handling Hardware Support
The CC2550 has built-in hardware support for
packet oriented radio protocols.
In transmit mode, the packet handler will add
the following elements to the packet stored in
the TX FIFO:
• A programmable number of preamble
bytes. 4 preamble bytes is recommended.
• A two byte Synchronization Word. Can be
duplicated to give a 4-byte sync word.
(Recommended).
• Optionally whiten the data with a PN9
sequence.
• Optionally Interleave and Forward Error
Code the data.
• Optionally compute and add a CRC
checksum over the data field.
20.1 Data whitening
From a radio perspective, the ideal over the air
data are random and DC free. This results in
the smoothest power distribution over the
occupied bandwidth. This also gives the
regulation loops in the receiver uniform
operation conditions (no data dependencies).
Real world data often contain long sequences
of zeros and ones. Performance can then be
improved by whitening the data before
transmitting, and de-whitening in the receiver.
Preliminary Data Sheet (rev. 1.1) SWRS039
Page 18 of 51