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CC2550 Datasheet, PDF (17/50 Pages) Texas Instruments – Single Chip Low Cost Low Power RF-Transmitter
CC2550
Bits Name
Description
7 CHIP_RDYn
Stays high until power and crystal have stabilized. Should always be low when using
the SPI interface.
6:4 STATE[2:0]
Indicates the current main state machine mode
Value State
Description
000 Idle
IDLE state
(Also reported for some transitional states instead
of SETTLING or CALIBRATE, due to a small error)
001 Not used
(RX)
Not used, included for software compatibility
with CC2500 transceiver
010 TX
Transmit mode
011 FSTXON
Fast TX ready
100 CALIBRATE
Frequency synthesizer calibration is running
101 SETTLING
PLL is settling
110 Not used
Not used, included for software compatibility
(RXFIFO_OVERFLOW) with CC2500 transceiver
111 TXFIFO_UNDERFLOW TX FIFO has underflowed. Acknowledge with
SFTX
3:0 FIFO_BYTES_AVAILABLE[3:0] The number of free bytes in the TX FIFO. If FIFO_BYTES_AVAILABLE=15, it
indicates that 15 or more bytes are available/free.
Table 15: Status byte summary
CSn:
Command strobe(s):
Read or write register(s):
Read or write consecutive registers (burst):
Read or write n+1 bytes from/to RF FIFO:
Combinations:
ADDRstrobe ADDRstrobe ADDRstrobe ...
ADDRreg DATA ADDRreg DATA ADDRreg DATA ...
ADDRreg n DATAn DATAn+1 DATAn+2
...
ADDRFIFO DATAbyte 0 DATAbyte 1 DATAbyte 2
...
DATAbyte n-1 DATAbyte n
ADDRreg DATA ADDRstrobe ADDRreg DATA ADDRstrobe ADDRFIFO DATAbyte 0 DATAbyte 1 ...
Figure 7: Register access types
18 Microcontroller Interface and Pin Configuration
In a typical system, CC2550 will interface to a
microcontroller. This microcontroller must be
able to:
CSn). The SPI is described in Section 0 on
page 13.
• Program CC2550 into different modes,
18.2 General Control and Status Pins
• Write buffered data
• Read back status information via the 4-wire
SPI-bus configuration interface (SI, SO,
SCLK and CSn).
18.1 Configuration Interface
The microcontroller uses four I/O pins for the
SPI configuration interface (SI, SO, SCLK and
The CC2550 has one dedicated configurable
pin and one shared pin that can output internal
status information useful for control software.
These pins can be used to generate interrupts
on the MCU. See Section 31 page 30 for more
details of the signals that can be programmed.
The dedicated pin is called GDO0. The shared
pin is the SO pin in the SPI interface. The
default setting for GDO1/SO is 3-state output.
By selecting any other of the programming
Preliminary Data Sheet (rev. 1.1) SWRS039
Page 17 of 51