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BQ24158_12 Datasheet, PDF (31/45 Pages) Texas Instruments – Fully Integrated Switch-Mode One-Cell Li-Ion Charger
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bq24153A, bq24156A
bq24158, bq24159
SLUSAB0A – OCTOBER 2010 – REVISED FEBRUARY 2012
Table 11. Charge Current Settings for 55-mΩ, 68-mΩ and 100-mΩ Sense Resistors (continued)
BIT
VI(CHRG0)
Offset
VI(REG) (mV)
6.8
37.4
IO(CHARGE) (mA)
R(SNS) = 55mΩ
124
680
IO(CHARGE) (mA)
R(SNS) = 68mΩ
100
550
IO(CHARGE) (mA)
R(SNS) = 100mΩ
68
374
For example, with a 68-mΩ sense resistor, V(CHRG3)=1, V(CHRG2)=0, V(ICHRG1)=0, and V(ICHRG0)=1, ITERM = [
(54.4mV x 1) + (27.2mV x 0) + (13.6mV x 0) + (6.8mV x 1) + 37.4mV ] / 68mΩ = 800mA + 0 + 0 + 100mA =
900mA.
Output Inductor and Capacitance Selection Guidelines
The IC provides internal loop compensation. With the internal loop compensation, the highest stability occurs
when the LC resonant frequency, fo, is approximately 40 kHz (20 kHz to 80 kHz). Equation 3 can be used to
calculate the value of the output inductor, LOUT, and output capacitor, COUT.
1
fo =
2p ´ LOUT ´ COUT
(3)
To reduce the output voltage ripple, a ceramic capacitor with the capacitance between 4.7 μF and 47 μF is
recommended for COUT, see the application section for components selection.
POWER TOPOLOGIES
System Load After Sensing Resistor
One of the simpler high-efficiency topologies connects the system load directly across the battery pack, as
shown in Figure 36. The input voltage has been converted to a usable system voltage with good efficiency from
the input. When the input power is on, it supplies the system load and charges the battery pack at the same time.
When the input power is off, the battery pack powers the system directly.
VBUS
SW
Isns
Isys
+ VIN
-
C1
L1
bq2415x
PMID
C2
C4
PGND
Rsns
C3
Ichg
+
BAT
System
Load
Figure 36. System Load After Sensing Resistor
The advantages:
1. When the AC adapter is disconnected, the battery pack powers the system load with minimum power
dissipation. Consequently, the time that the system runs on the battery pack can be maximized.
2. It reduces the number of external path selection components and offers a low-cost solution.
3. Dynamic power management (DPM) can be achieved. The total of the charge current and the system current
can be limited to a desired value by setting the charge current value. When the system current increases, the
charge current drops by the same amount. As a result, no potential over-current or over-heating issues are
caused by excessive system load demand.
4. The total input current can be limited to a desired value by setting the input current limit value. USB
specifications can be met easily.
5. The supply voltage variation range for the system can be minimized.
Copyright © 2010–2012, Texas Instruments Incorporated
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