BQ24158_12 Datasheet, PDF (22/45 Pages) Texas Instruments – Fully Integrated Switch-Mode One-Cell Li-Ion Charger

bq24153A, bq24156A
bq24158, bq24159
SLUSAB0A – OCTOBER 2010 – REVISED FEBRUARY 2012
Table 1. STAT Pin Summary
CHARGE STATE
Charge in progress and EN_STAT=1
Other normal conditions
Charge mode faults: Timer fault, sleep mode, VBUS or battery
overvoltage, poor input source, VBUS UVLO, no battery,
thermal shutdown
Boost mode faults (bq24153A/8 only): Timer fault, over load,
VBUS or battery overvoltage, low battery voltage, thermal
shutdown
STAT
Low
Open-drain
128-μs pulse, then open-drain
128-μs pulse, then open-drain
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Control Bits in Charge Mode
CE Bit (Charge Mode)
The CE bit in the control register is used to disable or enable the charge process. A low logic level (0) on this bit
enables the charge and a high logic level (1) disables the charge.
RESET Bit
The RESET bit in the control register is used to reset all the charge parameters. Writing ‘1” to the RESET bit will
reset all the charge parameters to default values except the safety limit register, and RESET bit is automatically
cleared to zero once the charge parameters get reset. It is designed for charge parameter reset before charge
starts and it is not recommended to set the RESET bit while charging or boosting are in progress.
OPA_Mode Bit
OPA_MODE is the operation mode control bit. When OPA_MODE = 0, the IC operates as a charger if
HZ_MODE is set to "0", refer to Table 2 for detail. When OPA_MODE=1 and HZ_MODE=0, the IC operates in
boost mode.
OPA_MODE
0
1(bq24153A/8
only)
X
Table 2. Operation Mode Summary
HZ_MODE
OPERATION MODE
0
Charge (no fault)
Charge configure (fault, V_bus > UVLO)
High impedance (V_bus < UVLO)
0
Boost (no faults)
Any fault go to charge configure mode
1
High impedance
CONTROL PINS IN CHARGE MODE
CD Pin (Charge Disable)
The CD pin is used to disable the charging process. When the CD pin is low, charge is enabled. When the CD
pin is high, charge is disabled and the charger enters high impedance (Hi-Z) mode. In 15-minute mode, taking
the CD pin high resets the 15-minute timer; while in 32s mode, taking the CD pin high does NOT reset the
32-second timer.
SLRST Pin (Safety Limit Register 06H Reset, bq24156A/9 only)
The safety limit registers provide a means to limit both the maximum charge current and maximum battery
regulation voltage at POR regardless of subsequent attempts to increase them via I²C. When the SLRST pin is
low, bq24156A/9 will reset all the safety limits to default values, regardless of the write actions to safety limits
registers (06H). When the SLRST pin is high, the bq24156A/9 can program the safety limit register until any write
action to other registers locks the programmed safety limits.
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