THS1031IPW Datasheet, PDF (30/41 Pages) Texas Instruments – 3-V TO 5.5-V, 10-BIT, 30 MSPS CMOS ANALOG-TO-DIGITAL CONVERTER

THS1031
3-V TO 5.5-V, 10-BIT, 30 MSPS
CMOS ANALOG-TO-DIGITAL CONVERTER
SLAS242E – NOVEMBER 1999 – REVISED MARCH 2002
PRINCIPLES OF OPERATION
details
The above value for R_AIN is derived by noting that the average AIN voltage must equal the bias voltage supplied
by the ac coupling network. The average value of V_LAST in equation 13 is thus a constant voltage
V_LAST = V(AIN bias) – VM
(13)
For an input voltage V_in at the AIN pin,
Qin = (V_IN – V_LAST) × C_S
(14)
Provided that f (–3 dB) is much lower than f_clk, a constant current flowing over the clock period can approximate
the input charging pulse
I_IN = Qin/t_clk
= Qin × f_clk
= (Vin – V_LAST) × C_S × f_clk
(15)
The ac input resistance R_AIN is then
R_AIN = dIin/dVin
= 1 / (dVin / dIin)
= 1 / (C_S x f_clk)
(16)
driving the VREF pin (differential mode)
Figure 35 shows the equivalent load on the VREF pin when driving the internal reference buffer via this pin
(MODE = AV_DD/2 and REFSENSE = AV_DD).
AVDD
VREF
RIN
14 kΩ
AGND
REFSENSE = AVDD,
Mode =
AVDD
2
+
_
AVDD + VREF/4
4
4
Figure 35. Equivalent Circuit of VREF
The current flowing into I_IN is given by
+ * IIN (3 VREF AVDD)
(4 RIN)
(17)
Note that the actual IIN may differ from this value by up to 50% due to device-to-device processing variations
and allowing for operating temperature variations.
The user should ensure that VREF is driven from a low noise, low drift source, well-decoupled to analog ground
and capable of driving I_IN.
30
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265