BQ24160A_15 Datasheet, PDF (30/52 Pages) Texas Instruments – bq2416xx 2.5A, Dual-Input, Single-Cell Switched-Mode Li-Ion Battery Charger with Power Path Management and I2C Interface

bq24160, bq24160A, bq24161
bq24161B, bq24163, bq24168
SLUSAO0F – NOVEMBER 2011 – REVISED JULY 2014
www.ti.com
BIT
NAME
Read/Write FUNCTION
B3
OTG_LOCK
Read/Write 0 – No OTG supply present. Use USB input as normal.
1 – OTG supply present. Lockout USB input for charging.
(default 0)
B2
BATSTAT1
Read Only 00-Battery Present and Normal
B1
BATSTAT0
Read Only ^{01-Battery OVP}
10-Battery Not Present
11- NA
B0 (LSB) EN_NOBATOP Read/ Write 0-Normal Operation
1-Enables No Battery Operation when termination is disabled (default 0)
OTG_LOCK Bit (USB Lockout)
The OTG_LOCK bit is used to prevent any charging from USB input regardless of the SUPPLY_SEL
bit and IN supply status. For systems using OTG supplies, it is not desirable to charge from an OTG
source. Doing so would mean draining the battery by allowing it to effectively charge itself. Write a “1”
to OTG_LOCK to lock out the USB input. Write a “0” to OTG_LOCK to return to normal operation.
During OTG lock, the USB input is ignored and DRV does not come up. The watchdog timer must be
reset while in USB_LOCK to maintain the USB lockout state. This prevents the USB input from being
permanently locked out for cases where the host loses I2C communication with OTG_LOCK set (i.e.,
discharged battery from OTG operation). See the Safety Timer and Watchdog Timer section for more
details.
EN_NOBATOP (No Battery Operation)
The EN_NOBATOP bit enables no battery operation. When using the bq2416x without a battery
attached, it is recommended to first disable charging, then disable charge termination and finally set
this bit to 1. Setting this bit to 1 also disables the reverse boost prevention circuit and the BATOVP
circuit. With a battery attached, setting this bit to 1 may be helpful to ensure full battery charging as
explained in the reverse battery prevention circuit section. In the event of battery overvoltage (e.g.,
recovery from large SYS load transient requiring supplement), the BATOVP protection circuit turns off
the buck converter to allow the battery to discharge through SYS.
9.6.3 Control Register (READ/WRITE)
Memory location: 02, Reset state: 1000 1100
BIT
B7 (MSB)
NAME
RESET
B6
IUSB_LIMIT_2
B5
IUSB_LIMIT_1
B4
IUSB_LIMIT _0
B3
EN_STAT
B2
B1
B0 (LSB)
TE
CE
HZ_MODE
Read/Write
Write only
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
FUNCTION
Write: 1 – Reset all registers to default values
0 – No effect
Read: always get “1”
000 – USB2.0 host with 100mA current limit
001 – USB3.0 host with 150mA current limit
010 – USB2.0 host with 500mA current limit
011 – USB host/charger with 800mA current limit
100 – USB3.0 host with 900mA current limit
101 – USB host/charger with 1500mA current limit
110–111 – NA (default 000⁽¹⁾)
1 – Enable STAT output to show charge status,
0-Disable STAT output for charge status. Fault interrupts are still show even when
EN_STAT = 0. (default 1)
1 – Enable charge current termination,
0-Disable charge current termination (default 1)
1 – Charging is disabled
0 – Charging enabled (default 0 bq24160/1/1B/3/8)
1 – High impedance mode
0 – Not high impedance mode (default 0)
(1) When in DEFAULT mode, the D+/D– (bq24160) or PSEL (bq24161/8) inputs determine the input current limit for the USB input.
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