BQ24160A_15 Datasheet, PDF (16/52 Pages) Texas Instruments – bq2416xx 2.5A, Dual-Input, Single-Cell Switched-Mode Li-Ion Battery Charger with Power Path Management and I2C Interface

bq24160, bq24160A, bq24161
bq24161B, bq24163, bq24168
SLUSAO0F – NOVEMBER 2011 – REVISED JULY 2014
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Feature Description (continued)
Power Path Management section for more details.) The termination current level is programmable. When setting
the termination threshold less than 150mA, the reverse boost protection may trip falsely with load transients and
very fully charged batteries. This will prevent termination while in the reverse boost protection and may extend
charge time. To disable the charge current termination, the host sets the charge termination bit (TE) of charge
control register to 0, refer to I²C section for details.
A new charge cycle is initiated if CD is low when either
1. V_SUPPLY rises above UVLO while a battery with V_BAT < V_BATREG - V_RCH is attached or
2. a battery with V_BAT < V_BATREG - V_RCH is attached while V_SUPPLY is above UVLO.
With V_SUPPLY above UVLO and V(BAT) < V_BOVP, a recharge cycle is initiated when one of the following conditions
is detected:
1. The battery voltage falls below the V_BAT(REG)-V_RCH threshold.
2. CE bit toggle or RESET bit toggle
3. Supplement mode event occurs
4. CD pin or HI-Z bit toggle
V_BAT(REG) should never be programmed less than V_BAT. If the battery is ever 5% above the regulation threshold,
the battery OVP circuit shuts the PWM converter off immediately and the battery FET is turned on to discharge
the battery to safe operating levels. If the battery OVP condition exists for the 1ms deglitch, a battery OVP fault is
reported in the I²C status registers. The battery OVP fault is cleared when the battery voltage discharges below
V_RCH or if the IC enters hi-impedance mode (HZ_MODE=1 or CD=1). Always write bq2416xx to high impedance
mode before changing V_BATREG to clear BOVP condition to ensure proper operation.
If the battery voltage is ever greater than VBATREG (for example, when an almost fully charged battery enters
the JEITA WARM state due to the TS pin) but less than V_BOVP, the reverse boost protection circuitry may activate
as explained later in this datasheet. If the battery is ever above V_BOVP, the buck converter turns off and the
internal battery FET is turned on. This prevents further overcharging of the battery and allows the battery to
discharge to safe operating levels. The battery OVP event does not clear until the battery voltage falls below
V_RCH.
9.3.3 Battery Detection
When termination conditions are met, a battery detection cycle is started. During battery detection, I_DETECT is
pulled from V_BAT for t_DETECT to verify there is a battery. If the battery voltage remains above V_DETECT for the full
duration of t_DETECT, a battery is determined to present and the IC enters “Charge Done”. If V_BAT falls below
V_DETECT, a “Battery Not Present” fault is signaled and battery detection continues. The next cycle of battery
detection, the bq2416xx turns on I_BATSHORT for t_DETECT. If V_BAT rises to V_DETECT, the current source is turned
offand after t_DETECT, the battery detection continues through another current sink cycle. Battery detection
continues until charge is disabled or a battery is detected. Once a battery is detected, the fault status clears and
a new charge cycle begins. Battery detection is not run when termination is disabled.
9.3.4 Dynamic Power Path Management (DPPM)
The bq2416xx features a SYS output that powers the external system load connected to the battery. This output
is active whenever a source is connected to IN, USB or BAT. The following sections discuss the behavior of SYS
with a source connected to the supply or a battery source only.
9.3.5 Input Source Connected
When a valid input source is connected to IN or USB and the bq2416xx is NOT in High Impedance mode, the
buck converter enters soft-start and turns on to power the load on SYS. The STAT/INT pin outputs a 128µs
interrupt pulse to alert the host that an input has been connected. The FAULT bits indicate a normal condition,
and the Supply Status register indicates that a new supply is connected. The CE bit (bit 1) in the control register
(0x02) indicates whether a charge cycle is initiated. By default, the bq2416xx (CE=0) enables a charge cycle
when a valid input source is connected. When the CE bit is '1' and a valid input source is connected, the battery
FET is turned off and the SYS output is regulated to the V_SYS(REG) programmed by the V_BATREG threshold in the
I²C register. A charge cycle is initiated when the CE bit is written to a 0 value (cleared).
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