BQ24160A_15 Datasheet, PDF (24/52 Pages) Texas Instruments – bq2416xx 2.5A, Dual-Input, Single-Cell Switched-Mode Li-Ion Battery Charger with Power Path Management and I2C Interface

bq24160, bq24160A, bq24161
bq24161B, bq24163, bq24168
SLUSAO0F – NOVEMBER 2011 – REVISED JULY 2014
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Feature Description (continued)
If two supplies are connected, the supply with precedence is checked first. If the supply detection fails once, the
device switches to the other supply for two seconds and then retries. This allows the priority supply to settle if the
connection was jittery or the supply ramp was too slow to pass detection. If the priority supply fails the detection
a second time, it is locked out and lower priority supply is used. Once the bad supply is locked out, it remains
locked out until the supply voltage falls below UVLO. This prevents continuously switching between a weak
supply and a good supply.
9.3.16.4 Input Overvoltage Protection
The built-in input overvoltage protection to protect the device and other downstream components against
damage from overvoltage on the input supply (Voltage from V_USB or V_IN to PGND). During normal operation, if
V_SUPPLY > V_OVP, the bq2416xx turns off the PWM converter, turns the battery FET and BGATE on, sends a single
128μs pulse is sent on the STAT and INT outputs and the STATx and FAULT_x bits of the status registers and
the battery/supply status registers are updated. Once the OVP fault is removed, the STATx and FAULT_x bits
are cleared and the device returns to normal operation.
To allow operation with some unregulated adapters, the OVP circuit is not active during Bad Source Detection.
This provides some time for the current sink to pull the unregulated adapter down into an acceptable range. If the
adapter voltage is high at the end of the detection, the startup of the PWM converter does not occur. The OVP
circuit is active during normal operation, so if the system standby current plus the charge current is not enough to
pull down the source, operation is suspended.
9.3.16.5 Reverse Boost (Boost Back) Prevention Circuit
A buck converter has two operating modes, continuous conduction mode (CCM) and discontinuous conduction
mode (DCM). In DCM, the inductor current ramps down to zero during the switching cycle while in CCM the
inductor maintains a DC level of current. Transitioning from DCM to CCM during load transients, slows down the
converter's transient response for those load steps, which can result in the SYS rail drooping. To achieve the
fastest possible transient reponse for this charger, this charger's synchronous buck converter is forced to run in
CCM even at light loads when the buck converter would typically revert to DCM. The challenge that presents
itself when forcing CCM with a charger is that the output of the buck converter now has a power source. Thus, if
the battery voltage, V(BAT), is ever greater than V_BATREG, the inductor current goes fully negative and pushes
current back to the input supply. This effect causes the input source voltage to rise if the input source cannot sink
current. The input over-voltage protection circuit protects the IC from damage however some input sources may
be damaged if the voltage rises. To prevent this, this charger has implemented a reverse boost prevention circuit.
When reverse current is sensed that is not a result of the supplement comparator tripping, this circuit disables
the internal battery FET and changes the feedback point to V_SYSREG for 1 ms. After the 1-ms timeout, the
BATFET is turned on again and the battery is tested to see if it is higher than V_BATREG (negative current). The
reverse current protection is only active when V_BOVP > V_BAT > V_BATREG - V_RCH. Having V_BOVP > V_BAT > V_BATREG -
V_RCH results in an approximately 100-mV, 1000-Hz ripple on SYS as seen in . The most common trigger for
reverse boost prevention is a load transient on SYS that requires the charger to enter battery supplement mode.
When the IC enters reverse boost prevention, the IC stops charging or exits charge done which may result in
the battery never reaching full charge. With termination enabled and ITERM > 150mA or with a high line
impedance to the battery, the likelihood of activating the reverse boost prevention circuit is small and even when
activated, the charger typically exits reverse boost prevention as the battery relaxes. With termination enabled
and ITERM < 150mA or with a low impedance battery, the likelihood of activating the reverse boost prevention
circuit by a load transient or even the inductor ripple current is higher. In either case, the IC resumes charging
until VBAT drops below VBATREG - VRCH, resulting in the battery always charging to at least 0.97 of full
charge. If full charge is required with ITERM < 150mA then the recommended solution to ensure full charge is
as follows
1. SET the charger’s enable no battery operation bit ( EN_NOBATOP) = 1 to disable the reverse boost
prevention circuits. Brief, low-amplitude voltage pulses on IN may be observed as the IC enters boost back
to resolve instances where VBAT is greater than the VBATREG, for example when exiting supplement
mode. The I2C communication software must ensure that VBATREG is never written below VBAT. The IC
automatically rewrites the VBATREG register to the default value of 3.6V when existing HOST mode. For
JEITA enabled ICs, the IC automatically lowers the voltage reference to 0.98 of the VBATREG value. The
software must account for these instances as well.
2.
Disable the charger’s termination function and TS functions and use a gas gauge to control
termination and TS through its independent voltage and current measurements.
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