DRV8412_15 Datasheet, PDF (29/42 Pages) Texas Instruments – DRV84x2 Dual Full-Bridge PWM Motor Driver

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Layout Example (continued)
DRV8412, DRV8432
SLES242G – DECEMBER 2009 – REVISED DECEMBER 2014
T1: PVDD decoupling capacitors C16, C19, C21, and C24 should be placed very close to PVDD_X pins and ground
return path.
T2: VREG decoupling capacitor C10 should be placed very close to VREG abd AGND pins.
T3: Clear the space above and below the device as much as possible to improve the thermal spreading.
T4: Add many vias to reduce the impedance of ground path through top to bottom side. Make traces as wide as
possible for ground path such as GND_X path.
Figure 21. Printed Circuit Board – Top Layer
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