DS90UB903QSQ Datasheet, PDF (28/45 Pages) Texas Instruments – DS90UB903Q/DS90UB904Q 10 - 43MHz 18 Bit Color FPD-Link III Serializer and Deserializer

DS90UB903Q, DS90UB904Q
SNLS332E – JUNE 2010 – REVISED APRIL 2013
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To configure the devices for display mode operation, set the Serializer MODE pin to High and the Deserializer
MODE pin to Low. Before initiating any I²C commands, the Serializer needs to be programmed with the target
slave device address and Serializer device address. DES_DEV_ID Register 0x06h sets the Deserializer device
address and SLAVE_DEV_ID register 0x7h sets the remote target slave address. If the I²C slave address
matches any of registers values, the I²C slave will acknowledge the transaction allowing read or write to target
device. Note: In Display mode operation, registers 0x08h~0x17h on Deserializer must be reset to 0x00.
PROGRAMMABLE CONTROLLER
An integrated I²C slave controller is embedded in each of the DS90UB903Q Serializer and DS90UB904Q
Deserializer. It must be used to access and program the extra features embedded within the configuration
registers. Refer to Table 1 and Table 2 for details of control registers.
I²C PASS THROUGH
I²C pass-through provides an alternative means to independently address slave devices. The mode enables or
disables I²C bidirectional control channel communication to the remote I²C bus. This option is used to determine
whether or not an I²C instruction is to be transferred over to the remote I²C device. When enabled, the I²C bus
traffic will continue to pass through and will be received by I²C devices downstream. If disabled, I²C commands
will be excluded to the remote I²C device. The pass through function also provides access and communication to
only specific devices on the remote bus. The feature is effective for both Camera mode and Display mode.
SYNCHRONIZING MULTIPLE LINKS
For applications requiring synchronization across multiple links, it is recommended to utilize the General Purpose
Input/Output (GPI/GPO) pins to transmit control signals to synchronize slave peripherals together. To
synchronize the peripherals properly, the system controller needs to provide a sync signal output. Note this form
of synchronization timing relationship has a non-deterministic latency. After the control data is reconstructed from
the birectional control channel, there will be a time variation of the GPI/GPO signals arriving at the different target
devices (between the parallel links). The maximum latency delta (t1) of the GPI/GPO data transmitted across
multiple links is 25 us.
Note: The user must verify that the timing variations between the different links are within their system and timing
specifications.
The maximum time (t1) between the rising edge of GPI/GPO (i.e. sync signal) arriving at SER A and SER B is 25
us.
DES A
GPI[n] Input
DES B
GPI[n] Input
SER A
GPO[n] Output
SER B
GPO[n] Output
t1
Figure 31. GPI/GPO Delta Latency
GENERAL PURPOSE I/O (GPI/GPO)
The DS90UB903Q/904Q has up to 4 GPO and 4 GPI on the Serializer and Deserializer respectively. The
GPI/GPO maximum switching rate is up to 66 kHz for communication between Deserializer GPI to Serializer
GPO.
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