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TMS320C6747CZKBT3 Datasheet, PDF (26/227 Pages) Texas Instruments – TMS320C6745,TMS320C6747 Fixed/Floating-Point Digital Signal Processor
TMS320C6745, TMS320C6747
SPRS377E – SEPTEMBER 2008 – REVISED FEBRUARY 2013
Start Address
Table 2-5. C6745 Top Level Memory Map (continued)
End Address
Size
DSP Mem Map EDMA Mem Map PRUSS Mem
Map
0x01F0 5000
0x01F0 5FFF
4K
HRPWM 2
0x01F0 6000
0x01F0 6FFF
4K
ECAP 0
0x01F0 7000
0x01F0 7FFF
4K
ECAP 1
0x01F0 8000
0x01F0 8FFF
4K
ECAP 2
0x01F0 9000
0x01F0 9FFF
4K
EQEP 0
0x01F0 A000
0x01F0 AFFF
4K
EQEP 1
0x01F0 B000
0x1170 0000
0x116F FFFF
0x117F FFFF
1024K
-
DSP L2 ROM (2)
0x1180 0000
0x1183 FFFF
256K
DSP L2 RAM
0x1184 0000
0x11DF FFFF
-
0x11E0 0000
0x11E0 7FFF
32K
DSP L1P RAM
0x11E0 8000
0x11EF FFFF
-
0x11F0 0000
0x11F0 7FFF
32K
DSP L1D RAM
0x11F0 8000
0x3FFF FFFF
-
0x4000 0000
0x5FFF FFFF
0x6000 0000
0x61FF FFFF
32M
EMIFA async data (CS2)
0x6200 0000
0x63FF FFFF
32M
EMIFA async data (CS3)
0x6400 0000
0x65FF FFFF
32M
EMIFA async data (CS4)
0x6600 0000
0x67FF FFFF
32M
EMIFA async data (CS5)
0x6800 0000
0x6800 7FFF
32K
EMIFA Control Registers
0x6800 8000
0xAFFF FFFF
-
0xB000 0000
0xB000 7FFF
32K
EMIFB Control Registers
0xB000 8000
0xBFFF FFFF
-
0xC000 0000
0xC7FF FFFF
128M
EMIFB SDRAM Data
0xC800 0000
0xDFFF FFFF
-
(2) The DSP L2 ROM is used for boot purposes and cannot be programmed with application code
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Master
Peripheral
Mem Map
LCDC
Mem
Map
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Device Overview
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