DS125RT410 Datasheet, PDF (24/42 Pages) Texas Instruments – DS125RT410 Low Power Multi-Rate Quad Channel Retimer

DS125RT410
SNLS459 – APRIL 2011
Address (Hex)
Bits
0x1e
7:5
4
0x1f
7
0x24
7
0
0x25
7:0
0x26
7:0
0x27
7:0
0x28
7:0
0x29
6:5
0x2a
7:0
0x2d
2:0
0x2f
7:6
5:4
3
2
1
0
0x30
4
3
1:0
0x31
6:5
4:3
0x32
7:4
3:0
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Table 7. Channel Registers (continued)
Default Value (Hex) Mode
0x7
R/W
0x0
R/W
0x0
R/W
0x0
R/W
0x0
R/W/SC
0x0
R
0x0
R
0x0
R
0x0
R
0x0
R
0x30
R/W
0x0
R/W
0x0
R/W
0x0
R/W
0x0
R/W
0x1
R/W
0x1
R/W
0x0
R/W
0x0
R
0x0
R/W
0x0
R/W
0x1
R/W
0x0
R/W
0x1
R/W
0x1
R/W
Field Name
Description
pfd_sel_data_mux[2:0 OutputMux <2:0>
]
(Enable from Register
0x09, Bit 5)
prbs_en
Enable PRBS
Generator
drv_sel_inv
Select Output Polarity
Inverted
fast_eom
Enable Fast Eye
Opening Monitor
Mode
eom_start
Start Eye Opening
Monitor Counter
(Self-Clearing)
eom_count[15:8]
Eye Opening Monitor
Count <15:8>
eom_count[7:0]
Eye Opening Monitor
Count <7:0>
heo[7:0]
HEO Value <7:0>
veo[7:0]
VEO Value <7:0>
eom_vrange_setting[ Eye Opening Monitor
1:0]
Voltage Range
Setting <1:0>
eom_timer_thr[7:0]
Eye Opening Monitor
Timer Threshold
<7:0>
drv_sel_vod[2:0]
Driver VOD <2:0>
RATE[1:0]
Rate <1:0>
SUBRATE[1:0]
Subrate <1:0>
index_ov
CTLE Adaptation
Index Override
(Register 0x13)
en_ppm_check
Enable Frequency
Counter for Lock
Detect
en_fld_check
False Lock Detector
for lock detect is
disabled by default.
Must set bit to 0 to
enable the FLD.
ctle_adapt
Start CTLE
Adaptation
heo_veo_interrupt
Goes High if Interrupt
from CDR Goes High
prbs_en_dig_clk
PRBS Generator
Enable
prbs_pattern_sel[1:0] PRBS Generator
Pattern Select <1:0>
adapt_mode[1:0]
Adaptation Mode
<1:0>
eq_sm_fom[1:0]
CTLE Adaptation
Figure of Merit Type
<1:0>
heo_int_thresh[3:0]
HEO Interrupt
Threshold <3:0>
veo_int_thresh[3:0]
VEO Interrupt
Threshold <3:0>
24
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