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| TMS320C6672_15 Datasheet, PDF (215/238 Pages) Texas Instruments – Multicore Fixed and Floating-Point Digital Signal Processor | |||
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TMS320C6672
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS708EâMarch 2014
7.19 EMIF16 Peripheral
The EMIF16 module provides an interface between DSP and external memories such as NAND and NOR flash. For
more information, see the External Memory Interface (EMIF16) for KeyStone Devices User Guide in ââRelated
Documentation from Texas Instrumentsââ on page 72.
7.19.1 EMIF16 Electrical Data/Timing
Table 7-76 EMIF16 Asynchronous Memory Timing Requirements (1) (2)
(see Figure 7-53 and Figure 7-54)
No.
Min
Max
Unit
General Timing
2
tw(WAIT)
Pulse duration, WAIT assertion and deassertion minimum time
28 td(WAIT-WEH) Setup time, WAIT asserted before WE high
14 td(WAIT-OEH) Setup time, WAIT asserted before OE high
Read Timing
2E ns
4E + 3 ns
4E + 3 ns
3
tC(CEL)
EMIF read cycle time when ew = 0, meaning not in extended wait mode
(RS+RST+RH+3)* (RS+RST+RH+3)* ns
E-3
E+3
3
tC(CEL)
EMIF read cycle time when ew =1, meaning extended wait mode enabled
(RS+RST+WAIT+ (RS+RST+WAIT+ ns
RH+3)* E-3
RH+3)* E+3
4
tosu(CEL-OEL) Output setup time from CE low to OE low. SS = 0, not in select strobe mode
5
toh(OEH-CEH) Output hold time from OE high to CE high. SS = 0, not in select strobe mode
4
tosu(CEL-OEL) Output setup time from CE low to OE low in select strobe mode, SS = 1
5
toh(OEH-CEH) Output hold time from OE high to CE high in select strobe mode, SS = 1
6
tosu(BEV-OEL) Output setup time from BE valid to OE low
7
toh(OEH-BEIV) Output hold time from OE high to BE invalid
8
tosu(AV-OEL)
Output setup time from A valid to OE low
9
toh(OEH-AIV)
Output hold time from OE high to A invalid
10 tw(OEL)
OE active time low, when ew = 0. Extended wait mode is disabled.
10 tw(OEL)
OE active time low, when ew = 1. Extended wait mode is enabled.
11 td(WAITH-OEH) Delay time from WAIT deasserted to OE# high
12 tsu(D-OEH)
Input setup time from D valid to OE high
13 th(OEH-D)
Input hold time from OE high to D invalid
Write Timing
(RS+1) * E - 3
(RH+1) * E - 3
(RS+1) * E - 3
(RH+1) * E - 3
(RS+1) * E - 3
(RH+1) * E - 3
(RS+1) * E - 3
(RH+1) * E - 3
(RST+1) * E - 3
(RST+1) * E - 3
3
0.5
(RS+1) * E + 3 ns
(RH+1) * E + 3 ns
(RS+1) * E + 3 ns
(RH+1) * E + 3 ns
(RS+1) * E + 3 ns
(RH+1) * E + 3 ns
(RS+1) * E + 3 ns
(RH+1) * E + 3 ns
(RST+1) * E + 3 ns
(RST+1) * E + 3 ns
4E + 3 ns
ns
ns
15
tc(CEL)
EMIF write cycle time when ew = 0, meaning not in extended wait mode
(WS+WST+WH+ (WS+WST+WH+ ns
3)* E-3
3)* E+3
15
tc(CEL)
EMIF write cycle time when ew =1., meaning extended wait mode is enabled (WS+WST+WAIT (WS+WST+WAIT ns
+WH+3)* E-3 +WH+3)* E+3
16 tosu(CEL-WEL) Output setup time from CE low to WE low. SS = 0, not in select strobe mode
(WS+1) * E - 3
ns
17
toh(WEH-CEH) Output hold time from WE high to CE high. SS = 0, not in select strobe mode
(WH+1) * E - 3
ns
16 tosu(CEL-WEL) Output setup time from CE low to WE low in select strobe mode, SS = 1
(WS+1) * E - 3
ns
17 toh(WEH-CEH) Output hold time from WE high to CE high in select strobe mode, SS = 1
(WH+1) * E - 3
ns
18 tosu(RNW-WEL) Output setup time from RNW valid to WE low
(WS+1) * E - 3
ns
19 toh(WEH-RNW) Output hold time from WE high to RNW invalid
(WH+1) * E - 3
ns
20 tosu(BEV-WEL) Output setup time from BE valid to WE low
(WS+1) * E - 3
ns
21 toh(WEH-BEIV) Output hold time from WE high to BE invalid
(WH+1) * E - 3
ns
22 tosu(AV-WEL)
Output setup time from A valid to WE low
(WS+1) * E - 3
ns
23 toh(WEH-AIV) Output hold time from WE high to A invalid
(WH+1) * E - 3
ns
Copyright 2014 Texas Instruments Incorporated
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Peripheral Information and Electrical Specifications 215
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