TMS320C6672_15 Datasheet, PDF (16/238 Pages) Texas Instruments – Multicore Fixed and Floating-Point Digital Signal Processor

TMS320C6672
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS708E—March 2014
Figure 2-1 shows the DSP core functional units and data paths.
Figure 2-1 DSP Core Data Paths
Note:
Default bus width
is 64 bits
(i.e. a register pair)
ST1
src1
.L1
src2
dst
src1
.S1
src2
dst
Data Path A
.M1
src1
src1_hi
src2
src2_hi
dst2
dst1
LD1
src1
32
DA1
32
.D1
dst
32
src2
32
32
DA2
32
LD2
Data Path B
ST2
.D2
src2
32
32
32
dst
32
src1
32
.M2
dst1
dst2
src2_hi
src2
src1_hi
src1
dst
.S2
src2
src1
dst
.L2
src2
src1
Register
File A
(A0, A1, A2,
...A31)
2´
1´
Register
File B
(B0, B1, B2,
...B31)
32
Control
Register
32
16 Device Overview
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