CC2400 Datasheet, PDF (21/84 Pages) Texas Instruments – 2.4 GHz Low-Power RF Transceiver

CC2400
19 4-wire Serial Configuration Interface
CC2400 is configured via a simple 4-wire
SPI-compatible interface (SI, SO, SCLK
and CSn) where CC2400 is the slave. This
interface is also used as data interface in
buffered mode (see page 27).
There are 44 16-bit configuration registers,
9 Command Strobe Registers, and one
register to access the FIFO. Each register
has a 7-bit address. The FIFO (32 bytes)
is 8 bits wide. A Read/Write bit indicates a
read or a write operation and forms the 8-
bit address field together with the 7-bit
address.
Some registers are termed Command
Strobe Registers. By addressing a
Command Strobe register internal
sequences will be started. These
commands can be used to quickly change
from RX mode to TX mode, for example.
A full configuration of CC2400 requires
sending 44 data frames of 24 bits each (7
address bits, R/W bit and 16 data bits).
The time needed for a full configuration
depend on the SCLK frequency. With a
SCLK frequency of 20 MHz the full
configuration is done in less than 5 µs.
Setting the device in power down mode
requires addressing one command strobe
register only, and will in this case take less
than 0.4 µs. All registers except the strobe
registers are also readable.
In each write-cycle, 24 bits are sent on the
SI-line. The bit to be sent first is the R/W
bit (0 for write, 1 for read). The next seven
bits are the address-bits (A6:0). A6 is the
MSB (Most Significant Bit) of the address
and is sent first. The 16 data-bits are then
transferred (D15:0). During address and
data transfer the CSn (Chip Select, active
low) must be kept low. See Figure 6.
The timing for the programming is shown
in Figure 6 with reference to Table 12. The
clocking of the data on SI into the CC2400
is performed on the positive edge of
SCLK.
The data word is loaded into the internal
configuration register, when the last bit,
D0, of the 16 data bits has been written.
The configuration data will be retained
during a programmed power-down mode,
but not when the power-supply is turned
off. The registers can be programmed in
any order.
The configuration registers can also be
read by the microcontroller via the same
configuration interface. The R/W bit must
be set high to initiate the data read-back,
then the seven address bits are sent.
CC2400 then returns the data from the
addressed register. SO is used as the
data output and must be configured as an
input by the microcontroller.
The command strobe register is accessed
in the same way as for a write operation,
but no data is transferred. That is, only the
R/W bit and the seven address bits are
written before CSn should be set high.
Figure 7 shows a summary of read and
write operations. A register read/write can
be terminated after one byte if only the
most significant byte is required. A register
can also be accessed repeatedly without
writing the address again. The buffer FIFO
(8 bit wide, 32 bytes) can be written
continuously by simply writing new bytes
over and over. The internal data pointer is
then updated for every written byte. The
session is terminated when the CSn is set
high.
Please note that a longer hold time, t_ps, is
needed before setting CSn high when
accessing the FIFO in buffered mode.
During the transfer of the address, the
CC2400 returns a status byte on the SO
line containing some important flags. This
is shown in Table 13.
SWRS042A
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