CDC950 Datasheet, PDF (2/16 Pages) Texas Instruments – 133-MHz DIFFERENTIAL CLOCK SYNTHESIZER/DRIVER FOR PC MOTHERBOARDS/SERVERS

CDC950
133ĆMHz DIFFERENTIAL CLOCK SYNTHESIZER/DRIVER FOR
PC MOTHERBOARDS/SERVERS
SCAS646B − FEBRUARY 2001 − REVISED OCTOBER 2003
functional block diagram
3-State/Low
SEL100/133
48
Control
Logic
Test
SEL100/133
2
3V48/SelA
3
3V48/SelB
4
Latched
XIN
XOUT
22
Xtal
23 Oscillator
48-MHz
PLL
180°
Phase
Shift
SPREAD
20
44
PWRDWN
/3
Spread
Logic
CPU
PLL
/2
/2 /2
MultSel0 ³⁰
MultSel1
29 ^{Control Logic}
2
I_REF ²⁶
1 REFCLK
14.318 MHz
(19)
1 3V48
48 MHz
(3)
1 3V48B
48 MHz
(4)
1 CLK33
33.3 MHz
(1)
8 HCLKs
100/133 MHz
(7,10,13,16,
33,36,39,42)
8 HCLKs
100/133 MHz
(8,11,14,17
32,35,38,41)
2
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