CDC950 Datasheet, PDF (11/16 Pages) Texas Instruments – 133-MHz DIFFERENTIAL CLOCK SYNTHESIZER/DRIVER FOR PC MOTHERBOARDS/SERVERS

CDC950
133ĆMHz DIFFERENTIAL CLOCK SYNTHESIZER/DRIVER FOR
PC MOTHERBOARDS/SERVERS
SCAS646B − FEBRUARY 2001 − REVISED OCTOBER 2003
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
CL
(see Note A)
RL = 500 Ω ^S1
RL = 500 Ω
VO(REF)
OPEN
GND
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
Open
VO(REF)
GND
LOAD CIRCUIT For tpd and tsk
From Output
Under Test
Test Point
CL
(see Note A)
3V
Input
0V
LOAD CIRCUIT for tr and tf
tw
VOLTAGE WAVEFORMS
VIH(REF)
VT(REF)
VIL(REF)
Input
Output
VT(REF)
VT(REF)
V_IH(REF)
V_T(REF)
V_IL(REF)
tPLH
tPHL
VOH
tr
tw(high)
tf
tw(low)
Output Enable
3V
(High-Level
Enabling)
0V
VOL
Output
Waveform 1
S1 at 6 V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
tPZL
tPZH
VT(REF)
tPLZ
VT(REF)
tPHZ
VT(REF)
VT(REF)
VDD
0V
≈3 V
VOL + 0.3 V _VOL
VOH
VOH − 0.3 V _{≈ 0 V}
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance. CL = 2 pF (HCLK, HCLK), CL = 20 pF (48 MHz, REF), CL = 30 pF (CLK33).
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 14.318 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
VIH(REF)
VIL(REF)
VT(REF)
VO(REF)
PARAMETER
High-level reference voltage
Low-level reference voltage
Input threshold reference voltage
Off-state reference voltage
3.3-V INTERFACE
2.4
0.4
1.5
6
Figure 1. Load Circuit and Voltage Waveforms
UNIT
V
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