BQ4822Y Datasheet, PDF (2/16 Pages) Texas Instruments – RTC Module With 8Kx8 NVSRAM

bq4822Y
Functional Description
Figure 1 is a block diagram of the bq4822Y. The follow-
ing sections describe the bq4822Y functional operation,
including memory and clock interface, data-retention
modes, power-on reset timing, watchdog timer activa-
tion, and interrupt generation.
Internal
Quartz
Time-
Base
÷8
Crystal
Oscillator
CE
OE
DQ0–DQ7
P
Bus
I/F
AD0–AD14
WE
Control/Status
Registers
Clock/Calendar, Alarm
and Control Bytes
Storage Registers
(16 Bytes)
VCC
Internal
Battery
Power-
Fail
Control
Write
Protect
Storage Registers
(8,176 Bytes)
÷ 64
÷ 64
16:1 MUX
RST
Reset and
Interupt
INT
Generator
Control/Calendar
Update
BD482201.eps
Truth Table
VCC
CE
< VCC (max.)
VIH
VIL
> VCC (min.)
VIL
VIL
< VPFD (min.) > VSO
X
≤ VSO
X
Figure 1. Block Diagram
OE
WE
Mode
DQ
Power
X
X
Deselect
High Z
Standby
X
VIL
Write
DIN
Active
VIL
VIH
Read
DOUT
Active
VIH
VIH
Read
High Z
Active
X
X
Deselect
High Z
CMOS standby
X
X
Deselect
High Z
Battery-backup mode
May 1997
2