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BQ4822Y Datasheet, PDF (1/16 Pages) Texas Instruments – RTC Module With 8Kx8 NVSRAM
bq4822Y
RTC Module With 8Kx8 NVSRAM
Features
® Integrated SRAM, real-time
clock, CPU supervisor, crystal,
power-fail circuit, and battery
® Real-Time Clock counts hun-
dredths of seconds through years
in BCD format
® RAM-like clock access
® Compatible with industry-
standard 8K x 8 SRAMs
® Unlimited write cycles
® 10-year minimum data retention
and clock operation in the ab-
sence of power
® Automatic power-fail chip dese-
lect and write-protection
® Watchdog timer, power-on reset,
alarm/periodic interrupt, power-
fail and battery-low warning
® Automatic leap year adjustment
® Software clock calibration for
greater than ±1 minute per
month accuracy
General Description
The bq4822Y RTC Module is a non-
volatile 65,536-bit SRAM organized
as 8192 words by 8 bits with an in-
tegral real-time clock and CPU su-
pervisor. The CPU supervisor pro-
vides a programmable watchdog
timer and a microprocessor reset.
Other features include an alarm,
power-fail and periodic interrupt,
and a battery low warning.
The device combines an internal
lithium battery, quartz crystal, clock
and power-fail chip, and a full
CMOS SRAM in a plastic 28-pin
DIP module. The RTC Module di-
rectly replaces industry-standard
SRAMs and also fits into many
EPROM and EEPROM sockets
without any requirement for special
write timing or limitations on the
number of write cycles.
Registers for the real-time clock,
alarm and other special func-
tions are located in registers
1FF0h–1FFFh of the memory array.
The clock and alarm registers are
dual-port read/write SRAM loca-
tions that are updated once per sec-
ond by a clock control circuit from
the internal clock counters. The
dual-port registers allow clock up-
dates to occur without interrupting
normal access to the rest of the
SRAM array.
The bq4822Y also contains a power-
fail-detect circuit. The circuit dese-
lects the device whenever VCC falls
below tolerance, providing a high de-
gree of data security. The battery is
electrically isolated when shipped
from the factory to provide maxi-
mum battery capacity. The battery
remains disconnected until the first
application of VCC.
Pin Connections
May 1997
RST 1
A12 2
A7 3
A6 4
A5 5
A4 6
A3 7
A2 8
A1 9
A0 10
DQ0 11
DQ1 12
DQ2 13
VSS 14
28 VCC
27 WE
26 INT
25 A8
24 A9
23 A11
22 OE
21 A10
20 CE
19 DQ7
18 DQ6
17 DQ5
16 DQ4
15 DQ3
28-Pin DIP Module
PN482201.eps
Pin Names
A0–A12 Address input
CE
Chip enable
RST
Microprocessor reset
WE
Write enable
OE
Output enable
DQ0–DQ7 Data in/data out
INT
Programmable interrupt
VCC
+5 volts
VSS
Ground
1