BQ4822Y Datasheet, PDF (13/16 Pages) Texas Instruments – RTC Module With 8Kx8 NVSRAM

bq4822Y
Write Cycle No. 1 (WE-Controlled) ^1,2,3
Address
CE
WE
tWC
tAW
tCW
tWR2
tAS
tWP
tDW
tDH2
DIN
Data-in Valid
tWZ
tOW
DOUT
Data Undefined (2)
Write Cycle No. 2 (CE-Controlled) ^1,2,3,4,5
High-Z
TD482204.eps
Address
CE
tWC
tAW
tAS
tCW
tWR2
Notes:
May 1997
tWP
WE
tDW
tDH2
DIN
Data-in Valid
tWZ
DOUT
Data Undefined (2)
High-Z
TD482205.eps
1. CE or WE must be high during address transition.
2. Because I/O may be active (OE low) during this period, data input signals of opposite polarity to the
outputs must not be applied.
3. If OE is high, the I/O pins remain in a state of high impedance.
4. Either tWR1 or tWR2 must be met.
5. Either tDH1 or tDH2 must be met.
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