BQ4822Y Datasheet, PDF (10/16 Pages) Texas Instruments – RTC Module With 8Kx8 NVSRAM

bq4822Y
AC Test Conditions
Parameter
Input pulse levels
Input rise and fall times
Input and output timing reference levels
Output load (including scope and jig)
DOUT
1k
+5V
1.9k
100pF
Test Conditions
0V to 3.0V
5 ns
1.5 V (unless otherwise specified)
See Figures 4 and 5
DOUT
1kΩ
+5V
1.9kΩ
5pF
FG482202.eps
Figure 4. Output Load A
FG482203.eps
Figure 5. Output Load B
Read Cycle (TA = TOPR, VCCMIN ≤ VCC ≤ VCCMAX)
–70
Symbol
Parameter
tRC
Read cycle time
tAA
Address access time
tACE
Chip enable access time
tOE
Output enable to output valid
tCLZ
Chip enable to output in low Z
tOLZ
Output enable to output in low Z
tCHZ
Chip disable to output in high Z
tOHZ
Output disable to output in high Z
tOH
Output hold from address change
Min.
70
-
-
-
5
5
0
0
10
Max.
-
70
70
35
-
-
25
25
-
Unit
Conditions
ns
ns Output load A
ns Output load A
ns Output load A
ns Output load B
ns Output load B
ns Output load B
ns Output load B
ns Output load A
May 1997
10