TMS320C6454_15 Datasheet, PDF (192/233 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

TMS320C6454
SPRS311I – APRIL 2006 – REVISED MARCH 2012
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Table 7-67. Switching Characteristics Over Recommended Operating Conditions for McBSP as SPI
Master or Slave: CLKSTP = 10b, CLKXP = 1^{(1) (2)}
(see Figure 7-56)
NO.
PARAMETER
MASTER ⁽³⁾
-720
-850
A-1000/-1000
SLAVE
UNIT
1
t_h(CKXH-FXL)
2
t_d(FXL-CKXL)
3
t_d(CKXL-DXV)
6
t_{dis(CKXH-DXHZ)}
Hold time, FSX low after CLKX high⁽⁴⁾
Delay time, FSX low to CLKX low⁽⁵⁾
Delay time, CLKX low to DX valid
Disable time, DX high impedance following
last data bit from CLKX high
MIN
T-2
H-2
-2
H-2
MAX
T+3
H+3
4
H+3
MIN
18P + 2.8
MAX
ns
ns
30P + 17 ns
ns
7
t_{dis(FXH-DXHZ)}
Disable time, DX high impedance following
last data bit from FSX high
6P + 3
18P + 17 ns
8
t_d(FXL-DXV)
Delay time, FSX low to DX valid
12P + 2
24P + 17 ns
(1) P = 1/CPU clock frequency in ns. For example, when running parts at 1000 MHz, use P = 1 ns.
(2) For all SPI Slave modes, CLKG is programmed as 1/6 of the CPU clock by setting CLKSM = CLKGDV = 1.
(3) S = Sample rate generator input clock = 6P if CLKSM = 1 (P = 1/CPU clock frequency)
S = Sample rate generator input clock = P_clks if CLKSM = 0 (P_clks = CLKS period)
T = CLKX period = (1 + CLKGDV) * S
H = CLKX high pulse width = (CLKGDV/2 + 1) * S if CLKGDV is even
H = (CLKGDV + 1)/2 * S if CLKGDV is odd
L = CLKX low pulse width = (CLKGDV/2) * S if CLKGDV is even
L = (CLKGDV + 1)/2 * S if CLKGDV is odd
(4) FSRP = FSXP = 1. As a SPI Master, FSX is inverted to provide active-low slave-enable output. As a Slave, the active-low signal input
on FSX and FSR is inverted before being used internally.
CLKXM = FSXM = 1, CLKRM = FSRM = 0 for Master McBSP
CLKXM = CLKRM = FSXM = FSRM = 0 for Slave McBSP
(5) FSX should be low before the rising edge of clock to enable Slave devices and then begin a SPI transfer at the rising edge of the Master
clock (CLKX).
CLKX
1
2
FSX
7
6
DX
Bit 0
DR
Bit 0
8
4
Bit(n-1)
Bit(n-1)
3
(n-2)
5
(n-2)
(n-3)
(n-3)
(n-4)
(n-4)
Figure 7-56. McBSP Timing as SPI Master or Slave: CLKSTP = 10b, CLKXP = 1
192 C64x+ Peripheral Information and Electrical Specifications
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