TMS320C6454_15 Datasheet, PDF (178/233 Pages) Texas Instruments – Fixed-Point Digital Signal Processor

TMS320C6454
SPRS311I – APRIL 2006 – REVISED MARCH 2012
10
HAS (input)
12
11
HCNTL[1:0] (input)
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HR/W (input)
HSTROBE^(A) (input)
9
13
37
HCS (input)
1
2
3
HD[31:0] (output)
6
36
7
38
HRDY^(B) (output)
A. HSTROBE refers to the following logical operation on HCS, HDS1, and HDS2: [NOT(HDS1 XOR HDS2)] OR HCS.
B. Depending on the type of write or read operation (HPID without auto-incrementing; HPIA, HPIC, or HPID with auto-
incrementing) and the state of the FIFO, transitions on HRDY may or may not occur. For more detailed information on
the HPI peripheral, see the TMS320C645x DSP Host Port Interface (HPI) User's Guide (literature number SPRU969).
C. The timing t_w(HSTBH), HSTROBE high pulse duration, must be met between consecutive HPI accesses in HPI32
mode.
Figure 7-49. HPI32 Read Timing (HAS Used)
178 C64x+ Peripheral Information and Electrical Specifications
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