TLC5911 Datasheet, PDF (19/30 Pages) Texas Instruments – LED DRIVER

PRINCIPLES OF OPERATION
gray scale clock generation (continued)
TLC5911
LED DRIVER
SLLS402 – DECEMBER 1999
MAG<2:0>
GSPOL
GSCLK
Except all low level
Except all low level
XGSOUT
PLLCLK
Same number of pulse as ratio
Same number of pulse as ratio
a) GSPOL is high
a) GSPOL is low
Figure 7. Gray Scale Clock Generation
The oscillation frequency bandwidth as referenced for the PLL can be set by an external resistor connected
between RBIAS and GND. The relation between the external resistor and the oscillation frequency is shown
in Table 7.
RBIAS
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _FREQUENCY
Table 7. PLL Oscillation Frequency
22 kΩ
13 to 16 MHz
30 kΩ
8 to 14 MHz
62 kΩ
4 to 9 MHz
12 0kΩ
3 to 5 MHz
Note that it takes 30 ms for the PLL to be stabilized. Furthermore, to make the PLL operation stabilized, a resistor
and a capacitor connection is required between VCOIN, PDOUT and GND. The recommended values are
shown in the Figure 8.
PDOUT
VCOIN
R(pd)
C(VCO)
Recommeded Value
C(VCO)
R(pd)
0.1 to 1 µF 22 to 62 kΩ
Figure 8. Resistor and Capacitor Connection
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