TLC5911 Datasheet, PDF (14/30 Pages) Texas Instruments – LED DRIVER

TLC5911
LED DRIVER
SLLS402 – DECEMBER 1999
PRINCIPLES OF OPERATION
Latch for Gray Scale Data
XLATCH
OUT15
Data
(10 bits)
OUT14
Data
(10 bits)
OUT1
Data
(10 bits)
OUT0
Data
(10 bits)
DOUT0 to 9
Shift Register for Gray Scale Data
16th byte
DIN9 MSB
DIN0 LSB
15th byte
DIN9 MSB
DIN0 LSB
2nd byte
DIN9 MSB
DIN0 LSB
1st byte
DIN9 MSB
DIN0 LSB
DCLK
DIN0 to 9
Figure 3. Relationship Between Shift Register and Latch for Gray Scale Data
shift register latch for brightness control
The shift register latch for brightness control is configured with 1 × 10 bits. Using the shift register latch for the
brightness control, the division ratio of the gray scale clock can be set and the output current value on constant
current output can be adjusted. When powered up, the latch data is indeterminate and the shift register is not
initialized. When these functions are used, data should be written to the shift register latch prior to lighting-on
(BLANK=L). Also, it is prohibited from rewriting the latch value for the brightness control when the constant
current output is turned on. When these functions are not used, the latch value can be set to the default value
setting of BCENA at low level (connect to GND). Also, DIN9 is assigned to the LSB of the reference current
control to maintain compatibility with the TLC5901/02/03 family. The configuration of the shift register and the
latch for brightness control is shown in Figure 4.
Latch for Brightness Control
XLATCH
Gray Scale Clock Division Ratio Data Set Current Data Adjusted On Constant Current Output
0
0
MSB
0
0
1
1
1
LSB MSB
1
1
1
LSB
(see Note A)
Shift Register for Brightness Control
DOUT0 to 9
DIN8
DATA
DIN7
DATA
DIN6
DATA
DIN5
DATA
DIN4 DIN3
DATA DATA
DIN2
DATA
DIN1
DATA
DIN0
DATA
DIN9
DATA
NOTE A: Indicates default value at BCENA low.
Figure 4. Relationship Between Shift Register and Latch for Brightness Control
DCLK
DIN0 to 9
shift register latch for dot correction
The shift register latch for dot correction is configured with 16 × 7 bits. Using the shift register latch for dot
correction, the current value on the constant current output can be set individually. When powered up, the latch
data is indeterminate and the shift register is not initialized. When these functions are used, data should be
written to the shift register latch prior to lighting-on (BLANK=L). Also, rewriting the latch value for dot correction
when the constant current output is turned on is inhibited. When these functions are not used, the latch value
can be set to the default value setting of DCENA at low level (connect to GND). The configuration of the shift
register and the latch for dot correction is shown in Figure 5.
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