GC3011 Datasheet, PDF (19/35 Pages) Texas Instruments – DIGITAL RESAMPLER

GC3011 DIGITAL RESAMPLER
4.2 OFFSET WORD REGISTERS
Registers 4, and 5 contain the 14 bit delay offset word. Bit 0 is the LSB, bit 13 is the MSB.
ADDRESS 4:
OFFSET BYTE 0
BIT
TYPE
0-7
R/W
NAME
OFFSET[0:7]
DESCRIPTION
Byte 0 (least significant) of the offset
ADDRESS 5:
OFFSET BYTE 1
BIT
TYPE
NAME
DESCRIPTION
0-5
R/W
6,7
R/W
OFFSET[8:13]
LOAD_OFFSET
Most significant 6 bits of the offset
The sync mode for loading the offset into the offset
circuit. See Table 1 in Section 4.4 for details.
If the desired delay offset is D, and the input sampling rate is F_IN, then the offset should be set to:
OFFSET = D*F_IN
Where OFFSET is a unsigned fractional value ranging from 0 to 4 and formatted as follows:
MSB
LSB
13 12 11 10 9 8 7 6 5 4 3 2 1 0
INTEGER
FRACTION
BINARY
POINT
Bits 12 and 13 are the integer part of OFFSET and can equal 0, 1, 2, or 3. The fractional part can
take on any value.
After loading the offset delay value the user can choose, using the LOAD_OFFSET control bits, to
have it take effect immediately, or when a sync event occurs.
GRAYCHIP,INC.
- 19 -
JULY 22, 1996
This document contains information which may be changed at any time without notice