DRV8711 Datasheet, PDF (19/34 Pages) Texas Instruments – STEPPER MOTOR CONTROLLER IC

DRV8711
www.ti.com
SLVSC40 – JUNE 2013
In a system with capacitor charge Q and desired rise time RT, IDRIVE and TDRIVE can be initially selected
based on:
IDRIVE > Q / RT
TDRIVE > 2 x RT
For best results, select the smallest IDRIVE and TDRIVE that meet the above conditions.
Example:
If the gate charge is 15 nC and the desired rise time is 400 ns, then select:
IDRIVEP = 50 mA, IDRIVEN = 100 mA
TDRIVEP = TDRIVEN = 1 µs
External FET Selection
In a typical setup, the DRV8711 can support external FETs over 50 nC each. However, this capacity can be
lower or higher based on the device operation. For an accurate calculation of FET driving capacity, use the
following equation.
Q
<
20mA
· (2 · DTIME + TBLANK
4
+
TOFF)
(3)
Example:
If a DTIME is set to 0 (400 ns), TBLANK is set to 0 (1 µs), and TOFF is set to 0 (500 ns), then the DRV8711 will
support Q < 11.5 nC FETs (please note that this is an absolute worst-case scenario with a PWM frequency
~ 430 kHz).
If a DTIME is set to 0 (400 ns), TBLANK is set to 0 (1 µs), and TOFF is set to 0x14 (10 µs), then the DRV8711
will support Q < 59 nC FETs (PWM frequency ~ 85 kHz).
If a DTIME is set to 0 (400 ns), TBLANK is set to 0 (1 µs), and TOFF is set to 0x60 (48 µs), then the DRV8711
will support Q < 249 nC FETs (PWM frequency ~ 20 kHz).
Stall Detection
The DRV8711 implements a back EMF monitoring scheme that is capable of detecting a stall during stepper
motor motion. This stall detection is intended to be used to get an indication when a motor is run into a
mechanical stop, or when an increased torque load on the motor causes it to stall.
To determine that a stall has occurred, a drop in motor back EMF is detected. The DRV8711 supports two
methods of this detection: an automatic internal stall detection circuit, or the ability to use an external
microcontroller to monitor back EMF.
During a zero-current step, one side of the H-bridge is placed in a high impedance state, and the opposite low-
side FET is turned on for a brief duration defined by TORQUE register SMPLTH bit [10:8]. This allows the current
to decay quickly through the low-side FET and the opposite body diode. Which side of the bridge is tri-state and
which one is driven low depends on the current direction on the previous step. The bridge with the high side that
has been actively PWMed (at the beginning of the PWM cycle during blank time) prior to entering the zero-
current step will be held low and the opposite side will be tri-stated.
Back EMF is sampled on the tri-stated output pin at the end of SMPLTH time (TORQUE register bit [10:8]). The
back EMF from the selected pin is divided by 4, 8, 16, or 32, depending on the setting of the VDIV bits in the
STALL register. The voltage is buffered and held on an external capacitor placed on the BEMF pin. The signal on
the BEMF output pin can be further processed by a microcontroller to implement more advanced control and stall
detection algorithms.
Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: DRV8711
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